English
Choosing the right memory for high performance FPGA platforms
Reuben George, Cypress
embedded.com (April 19, 2016)
High performance computing is critical for many applications and developers can often find solutions for their own embedded systems design problems in some of the most competitive of these applications. For example, high-frequency trading (HFT) is a form of algorithmic trading that accounts for the majority of US equity trading volume. High-frequency trading involves using machine-learning algorithms to process market data, implement strategy, and execute orders within microseconds. High-frequency traders move in and out of short-term positions at high volumes aiming to capture sometimes a fraction of a cent in profit on every trade. Systems using HFT algorithms constantly monitor price fluctuations for short-term trading strategies. Because it’s a very short-term trading strategy, HFT firms do not consume significant amounts of capital, accumulate positions or hold their portfolios overnight. Today, high-frequency trading accounts for more than 75% of US equity trading volumes.
At the turn of the 21st century HFT trading was focused on superior algorithms and trading strategies. So the advantage lay on strategy rather than speed with the most popular systems having latency of the order of seconds. By 2010, algorithmic improvements were not sufficient to gain trade advantages, and participants started reducing tick-to-trade latency to gain an advantage over each other. This brought trade time down to microseconds.
Stimulated by sub-millisecond buy and sell trade orders, HFT platforms are engaging in a highly competitive speed race to cut down market data round-trip latency into the microsecond order. Since a difference of even a few nanoseconds can create a big competitive advantage in the form of latency arbitrage (referred to as ‘front running’), trading firms are constantly on the lookout for faster trading servers.
Traditionally, software tools have been used to perform HFT trading. These tools make use of high-performance computing systems that are efficient in performing complex trading strategies (Figure 1). The OS kernels on these systems control access to CPU and memory resources while the application stack handles all trading strategies. A Network Interface Card (NIC) is used to interface the system to the stock exchange.
|
E-mail This Article | 
|
|
Printer-Friendly Page |
|
||||||
Related Articles
- Achieving High Performance Non-Volatile Memory Access Through "Execute-In-Place" Feature
- Choosing the right A/D converter architecture and IP to meet the latest high speed wireless standards
- Optimizing High Performance CPUs, GPUs and DSPs? Use logic and memory IP - Part II
- Interfacing High Performance 32-bit Cores To MCU-based Memory Architectures
- How to tackle serial backplane challenges with high-performance FPGA designs
New Articles
Most Popular
- System Verilog Assertions Simplified
- System Verilog Macro: A Powerful Feature for Design Verification Projects
- Enhancing VLSI Design Efficiency: Tackling Congestion and Shorts with Practical Approaches and PnR Tool (ICC2)
- Synthesis Methodology & Netlist Qualification
- Streamlining SoC Design with IDS-Integrate™