ARM intrusive debugging for post-silicon SoC validation

Ayushi Agarwal & Shruti Maheshwari (NXP)
EDN -- August 25, 2016

Debugging large RTL projects has become increasingly complex. With different types of applications evolving, there is a need for different ways to enable debug hooks in every application. Although the debug architecture of the SOC is at par with its complex design to make non-intrusive debugs easy, but there are multiple scenarios which require intrusive debugging. This article compiles a few scenarios which depict the use of intrusive debugging for validation of an SOC.

Low-power handshake

As the demand of power saving has increased in applications, there are multiple power domains in an SOC which are power-gated or ungated based on requirements of the use case. During low power modes, one or multiple power domains of the SOC are powered down while others are still running. In such cases, occurrence of any issue and its debug becomes more complex. Debugging during power saving modes is not always possible since sometimes SOC debug logic itself is powered down. To capture the debug information from a running application during such power-gated modes, the debugger should be continuously communicating with the SOC and should capture all the relevant information before entry and after exit from such modes.

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