Original Lossless codec IP core - Full HD 30fps@126MHz (1Sample/clk)
EDA Finds a Common Framework for AI
By David White, Cadence
EETimes (April 29, 2019)
There's a model emerging for designing commercial decision systems such as EDA tools with embedded machine learning, writes an AI expert at Cadence in the first installment of a two-part article.
Last year, I was asked to serve on a panel at the NATO Science and Technology Board meeting. The group included folks from the various NATO countries working on AI and machine learning, mostly for applications associated with military-related operations, logistics, piloting, and surveillance-related decision-making. Over the past six months, our discussions have continued as we see more commonality with the military and aerospace communities in the area of AI-based applications for complex decision systems.
My talk was focused on the use of AI and other technologies to improve electronic design automation given that the cost, performance, and reliability of electronics is critical to the mission success of many systems and vehicles. There are also growing concerns about the cost of electronics development and processes related to the verification and support of next-generation AI chips, whether they use conventional or neuromorphic architectures.
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |
|
Cadence Hot IP
Related Articles
- AI Challenges for Next-Gen EDA
- Nexus: A Lightweight and Scalable Multi-Agent Framework for Complex Tasks Automation
- Synopsys Foundation IP Enabling Low-Power AI Processors
- Accelerating SoC Evolution With NoC Innovations Using NoC Tiling for AI and Machine Learning
- Revolutionizing Chip Design with AI-Driven EDA
New Articles
- Discover new Tessent UltraSight-V from Siemens EDA, and accelerate your RISC-V development.
- The Critical Factors of a High-performance Audio Codec - What Chip Designers Need to Know
- Density Management in Analog Layout Design: Addressing Issues and Ensuring Consistency
- Nexus: A Lightweight and Scalable Multi-Agent Framework for Complex Tasks Automation
- How the Ability to Manage Register Specifications Helps You Create More Competitive Products
Most Popular
- System Verilog Assertions Simplified
- System Verilog Macro: A Powerful Feature for Design Verification Projects
- Synthesis Methodology & Netlist Qualification
- Discover new Tessent UltraSight-V from Siemens EDA, and accelerate your RISC-V development.
- Understanding Logic Equivalence Check (LEC) Flow and Its Challenges and Proposed Solution