Scalable, On-Die Voltage Regulation for High Current Applications
It's Time to Look at FD-SOI (Again)
By Eric Hong, Mixel and Nik Jedrzejewski, NXP
EETimes (January 21, 2021)
The emergence of FD-SOI, (fully depleted silicon-on-insulator) and its subsequent maturity over the years, has made it one of the seminal process advancements for low power semiconductor design. Although not as prevalent as the mainstream bulk CMOS process, FD-SOI has provided an important set of benefits to semiconductor product designers. These advances intersect with market demands for devices with more intelligence and better connectivity.
Envisioning and developing these new products require the support of an entire ecosystem. It is important to appreciate the investment necessary to build an ecosystem to support a process like FD-SOI. Although the choice of foundry, process technology, or silicon IP is not a concern of the consumer using such devices, it is of critical concern to those of us who need to build these products.
What differentiates FD-SOI as an important process technology? There are a set of intrinsic benefits in comparison with bulk silicon, including improved power, performance, and area metrics. There are also specific operational optimizations that improve both the power and performance of FD-SOI devices.
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