Revolutionizing Chip Design with AI-Driven EDA
By Thomas Andersen, Synopsys
electronicdesign.com (September 2, 2024)
Artificial intelligence is fueling innovation across industries, driving demand in the semiconductor industry for more chips with exponentially more performance and energy efficiency. Not surprisingly, the chip industry has turned to AI to help meet these needs. By leveraging AI to automate tedious tasks throughout the chip design and development flow, as well as enhance human creativity and decision-making, AI is now fueling new chip design innovations that would have been unimaginable just a few years ago.
In this article, we’ll explore how chip designers are leveraging AI in innovative ways. These involve the acceleration of chip development despite growing complexity, designing for specific use cases like high-performance computing and automotive, and addressing the growing semiconductor engineering workforce gap.
E-mail This Article | Printer-Friendly Page |
|
Synopsys, Inc. Hot IP
Related Articles
- AI-driven SRAM demand needs integrated repair and security
- Synopsys 3DIO Solution for Multi-Die Integration (2.5D/3D)
- Maximizing Performance & Reliability for Flash Applications with Synopsys xSPI Solution
- Three Major Inflection Points for Sourcing Bluetooth Intellectual Property
- Revolutionizing AI Inference: Unveiling the Future of Neural Processing
New Articles
- Quantum Readiness Considerations for Suppliers and Manufacturers
- A Rad Hard ASIC Design Approach: Triple Modular Redundancy (TMR)
- Early Interactive Short Isolation for Faster SoC Verification
- The Ideal Crypto Coprocessor with Root of Trust to Support Customer Complete Full Chip Evaluation: PUFcc gained SESIP and PSA Certified™ Level 3 RoT Component Certification
- Advanced Packaging and Chiplets Can Be for Everyone
Most Popular
- System Verilog Assertions Simplified
- System Verilog Macro: A Powerful Feature for Design Verification Projects
- UPF Constraint coding for SoC - A Case Study
- Enhancing VLSI Design Efficiency: Tackling Congestion and Shorts with Practical Approaches and PnR Tool (ICC2)
- PCIe error logging and handling on a typical SoC