1.8V/3.3V I2C 5V Failsafe Failtolerant Automotive Grade 1 in GF (12nm)
32-bit DSP right mix for embedded control
32-bit DSP right mix for embedded control
By Kedar Godbole, EE Times
December 11, 2003 (7:14 p.m. EST)
URL: http://www.eetimes.com/story/OEG20031211S0048
Modern applications requirements are increasingly demanding. Consequently designers must do more with less, integrating multiple functions into the same processor and optimizing system cost. And designers must choose from an array of programmable processors, ranging from the 8-bit microcontroller to the 32-bit digital signal processor. In a control application-for example, motor speed or position control-the designer must ensure that the system meets the dynamic performance specifications. In addition, the system must implement several other functions, including sensor elimination algorithms, power-factor correction, noise filtering and spread-spectrum techniques to control electromagnetic emissions. Most of these objectives are gained through implementing mathematical algorithm processing, so a processor capable of executing numerically intensive algorithms is warranted. Determining the word length of the processor required demands an insi ght into those algorithms. The most common control implementation uses either a proportional-integral-derivative or a state-variable-based controller. Computations within such controllers must be implemented with high precision to avoid issues such as limit cycles and overflows, and to ensure proper intersample behavior. Today's designs need 32-bit-wide coefficients and intermediate variables for the best performance. General-purpose 16- and 32-bit microcontrollers are inefficient at processing mathematical computations. Bolt-on multipliers lack the data path to support sustained multiply and accumulate for high-performance numerical computation. DSPs, which are designed to process numerical computations with the highest possible efficiency, are optimally suited to run the mathematical control law computations. A key consideration is the width of the numbers to be processed and the native processor word length. A 16-bit signal processor cannot process 32-bit numerical problems efficiently. Im plementation of multiprecision arithmetic is extremely inefficient, usually by a factor of four to 10. Second, to ensure proper responses to high-frequency dynamics, designers of servo systems often choose to oversample, leading to numerical-conditioning challenges. These are easily addressed by 32-bit signal processors. Modern 32-bit DSPs also excel at offering architectures that are efficient at running compiled C code. In general, a 32-bit processor can implement operations such as 32-bit increments and decrements faster than a comparable 16-bit processor. Also, a 32-bit processor typically offers a larger memory reach, simplifying the memory design. A 32-bit DSP emerges as the solution with the necessary processing ability, complemented by the appropriate peripherals. This device supplies an optimal solution at very competitive costs. When selecting a programmable processor, significant trade-offs involve available integration and code size. Modern 32-bit DSPs are integrating ever more peripherals. Control-specific peripherals such as pulse-width modulators, communication ports and analog-to-digital converters let designers eliminate external components and reduce system cost. Integration of large amounts of flash memory and RAM eliminates external flash/RAM devices, again reducing cost and complexity. The code density of 32-bit processors has been a much-examined trade-off. The latest DSP designs are using a judicious mix of 16-bit and 32-bit instructions. By packing the instructions such that they are 32-bit only when the amount of information that must be encoded needs 32 bits, and using 16 bits for the rest, the code becomes dense, reducing memory needs. Since a 32-bit DSP uses wider internal buses, it needs more gates than an equivalent 16-bit DSP. The die size for a modern embedded processor, however, is dominated by the memories and peripherals integrated. That, coupled with shrinking semiconductor geometries, makes 32-bit DSPs attractive. In the case o f controllers that must function equally efficiently as both microcontroller and DSP, a tuned architecture and peripheral choices are major considerations. For the high-precision control market, this means a core architecture highlighted by 32 x 32-bit multiplier, 32-bit times, real-time JTAG, 32-bit registers and a read-modify-write arithmetic logic unit. Peripherals include PWMs, encoder interfaces, 12-bit A/D, watchdog timer and CAN interface. Electric motors consume two-thirds of the industrial electric consumption and one-fourth of the residential electric consumption, so proper sizing of electric motors is important. Often such motors are oversized to meet transient specifications, or else complex mechanical assemblies are added to handle transients. A smart controller implementing vector control can provide faster transient response, simplify the system and lead to better overall efficiency and reliability. Position predictions The challenge in implementing cost-effective smart control is in the mathematical complexity of the algorithms. Most MCUs are not able to deal with such computational complexity in real-time, but modern DSP controllers provide the computational power required for smart control, as well as SoC integration and software development support. Texas Instruments has assembled a software suite to support advanced con trol. TI's 150-Mips TMS320F2812 digital signal controllers illustrate the new combination of DSP performance and flexibility. A single-cycle 32-bit multiply-accumulate data path, or dual 16-bit MACs, combine high-end precision and DSP speed. High-speed interrupt handling, plus instructions for common control operations such as bit manipulation and branching, make it possible to use the devices in the multipurpose, multitasking environment. PWM outputs, A/D converters, flash and support for the CAN bus provide SoC integration for cost-effective smart motor control. Best-in-class software support includes IQMath, for addressing scaling needs. Advanced code density and vastly improved compiler technology make today's DSPs better at generating efficient code. Software is a critical aspect of any DSP development, and an extensive library of motor control speeds development time and eases the process. Kedar Godbole works with digital motor control applications in the Semiconductor Group at Texas Instruments Inc. (Houston).
Vector control algorithms involve measuring or predicting the position of the rotor flux and then placing the stator flux, generated by a polyphase winding, in optimal fashion to generate the most torque for a given flux configuration. For a permanent-magnet motor, the stator flux is placed 90 degrees away (electrical angle). This gives the best possible torque production, since the torque produced is directly proportional to the sine of the angle between the fluxes. (In an ac induction motor, the relationship between the fluxes is more complicated, owing to the magnetizing component of the flux, but the basic principle is the same.)
Related Articles
New Articles
- Quantum Readiness Considerations for Suppliers and Manufacturers
- A Rad Hard ASIC Design Approach: Triple Modular Redundancy (TMR)
- Early Interactive Short Isolation for Faster SoC Verification
- The Ideal Crypto Coprocessor with Root of Trust to Support Customer Complete Full Chip Evaluation: PUFcc gained SESIP and PSA Certified™ Level 3 RoT Component Certification
- Advanced Packaging and Chiplets Can Be for Everyone
Most Popular
- System Verilog Macro: A Powerful Feature for Design Verification Projects
- System Verilog Assertions Simplified
- Smart Tracking of SoC Verification Progress Using Synopsys' Hierarchical Verification Plan (HVP)
- Dynamic Memory Allocation and Fragmentation in C and C++
- Synthesis Methodology & Netlist Qualification
E-mail This Article | Printer-Friendly Page |