English
Mixed Signal SoC Applications
by Ron Landry, AMI Semiconductor
Dallas, TX USA
Abstract :
This paper discusses several Mixed Signal System on a Chip applications. Examples include Smart Sensors, low data rate RF devices and Medical monitoring devices. The challenges that face the analog designer and how these are balanced with the digital portions are discussed. Presented also are processor architectures and peripheral requirements that fit well with Mixed Signal applications. Lastly, a call for continued investment in 8-bit architectures and integration tool chains is made.
Introduction
It is not hard to realize that almost all applications, when viewed at a system level, are analog in nature. The “Real World” is analog. We hear, see and even feel signals that are continuous with respect to time and amplitude. Even our inventions to mimic the senses, we call them sensors, operate in the analog domain. Once this is realized one can see that the opportunities for Mixed-Signal designs are abundant. In this paper we will explore Smart Sensors, Medical and Low Data rate RF SoCs and discuss some of the challenges brought on by integration of digital and analog circuits on the same semiconductor.
In the industrial market place the traditional electromechanical systems are being replaced by solid-state electronic systems. Many of these systems incorporate the transducer right on the silicon. Magnetic, temperature and light sensing are examples of these. These applications are also being driven to provide an extra degree of intelligence right at the sensing node. The flexibility that is gained by incorporating a microprocessor in the design is being used for intelligent communication over a communications network (protocol), long-term statistical performance monitoring and local in service diagnostic functionality. These additional functions are translating into higher performing and higher reliable sensing systems in the industrial market space.
Medical devices are enjoying the benefits of SoC technologies as well. As more and more medical diagnostic equipment is finding it’s way into the doctor’s office and even the home environment, it is becoming evident that an easy to use interface is mandatory. Driving LCD displays and sensing keypads is easy work for the processor portion of an SoC. Another requirement for many of these applications is battery operation and that certainly means low power. Rechargeable batteries are common place and the supporting analog circuitry is just another requirement that can be filled by a Mixed-Signal SoC. Lastly, many medical devices require high voltage drive capabilities that can only be achieved through analog design techniques.
Low data rate RF devices are finding their way into Medical, Industrial and even automotive applications. These are almost always paired with a microprocessor. Many applications such as telemetry, security, monitoring, keyless entry and sensing do not require the overhead of more complex RF technologies such as Bluetooth. To the contrary, the extra costs involved because of the greater processing and larger memory requirements would be cost prohibitive. In these cases a low data rate solution such as Zigbee (802.15.4) is a much better fit. As you can see there is some overlap of these applications. Low data rate wireless capability is a very useful feature in both industrial sensing and medical monitoring devices. It is important to select a semiconductor partner that has a broad range of expertise when designing a multifaceted SoC.
Mixed Signal Design in Deep Sub-Micron Technologies
There are mixed signal applications at every point on the process technology curve. Applications that are driven by high volume production and also have large digital content are better suited for the deep sub-micron technologies. There are however many applications that are truly better served by the more mature processes.
In order to understand how the larger geometries can be better suited for some Mixed-Signal applications one needs to understand all of the characteristics involved. Here we will discuss 7, although this by no means covers them all. The attributes that are discussed are gate size, parasitics, transconductance, voltages, channel resistances, linearity, noise and modeling.
Gate and memory size in mixed signal applications generally drive cost. This is because most Mixed Signal devices are core limited. This can be quite different than an all digital circuit. Many times the all digital device will have so many IO that the number of pads on the device determines the periphery and therefore the area. This is rarely the case for Mixed Signal devices. For the most part digital cells scale pretty closely to the expected area savings. One would expect a 0.25 micron cell to be 51% smaller than a 0.35 micron cell of equivalent function. This can be seen by inspection of the following formula:
While this holds for digital cells we will see that the analog cells are quite a different story. Because of this the amount of digital content (including memory) is very key in determining the best technology for the application.
Parasitics lessen as the geometry decreases. This is good news for both the digital and analog designer. Understandably this will translate into high bandwidths and data rates. While the magnitude of the parasitic capacitance per gate or resistance of the interconnect is most assuredly lower as geometry decreases, it is also less predictable. This can cause analog modeling problems and highlights the need for careful understanding of the parasitics.
The transconductance characteristic is the relationship between a drain current and the voltage across the gate and source. As the geometry decreases the transconductance gets higher. This is good news for both analog and digital domains in that smaller conductance interacts with capacitance to create smaller bandwidths and therefore lower data rates.
It is well understood that as geometry decreases the voltage limits of the device decrease as well. In the pure digital world this is beneficial in several ways, less power and less radiated emissions. The only down side has been the need for multiple voltage rails on most digital circuits. In the analog domain the power savings is there but reduced range of operation make the design task harder. It is quite common for analog designers to bias their circuits with at VT + 2Von and Vdd – (VT + 2Von). Unfortunately the threshold voltage, VT, does not scale with the geometry. In other words the operating range of voltages gets smaller as the technology shrinks. This means the analog portions of the circuit have to be more tightly controlled which translates to larger, better matched transistors.
Channel resistance gets lower as the technology shrinks. While this may sound like a good thing, and for digital circuits it generally is, this translates to transistors with lower gain in the analog domain. Lower gain may mean more stages in the circuit.
The linearity of smaller geometries also becomes a factor to consider when doing analog design. Often non-linearity problems are solved by increasing the size of the circuit. An example of this can be seen in D>A and A<D converters were the performance of the converter is very much proportional to the size of the circuit.
Noise in circuits implemented in smaller technologies can become problematic for the analog designer. This is usually worsened by the fact that there is usually a large and fast digital circuit that is generating much of the noise. The smaller operating voltage range works against the designer as well. Signal to noise ratio in the analog circuit gets worse because the signal levels go down but the noise levels may actually go up.
Lastly, modeling of analog circuits in smaller geometries has been problematic. Much of this is due to the lower levels of predictability and the nature of the parasitics. Some of it is due to the maturity of the technology as well. This, of course, will improve as the technology develops.
Because of these items listed above it is important to understand that as the process geometry shrinks, the analog actually gets bigger, and definitely harder. This has to be compensated for by increasing the sizes of the transistors, capacitors and resistors used. Moving to smaller technologies should only be done when the performance requirements of the application demands it. For most Mixed Signal SoC devices this will be driven by the digital gate count and the amount of memory in the design. Only when there is significant digital content should smaller technologies be adopted.
Another thing to consider is that some functions can be implemented in either the digital or analog domain. Filtering is a good example of this. A good rule of thumb is if the circuit can be designed digitally in a cost effective manner, keep it digital. Only design analog cells when you have to. This will help to increase your digital content and decrease the analog so the designer can be more aggressive in moving to smaller technologies.
Mixed Signal SoC Applications
Examples of applications that fit well into Mixed Signal SoC technologies are medical devices, low data rate RF and Smart Sensors. All of these applications are usually powered by a some sort of microprocessor and therefore make good candidates for reaching a higher level of integration, an SoC.
Medical devices are becoming more and more abundant as procedures are routinely being conducted in the doctor’s office or even at the patients home. These applications typically require some sort of sensor interface, signal conditioning, digital signal processing and some way of communicating the results outside the device. These designs typically require an ADC or DAC and analog circuits for compensation. The communications to a user display or over some sort of communications network is almost always handled by the processing unit. User input devices such as keypads, keyboards, pointing devices or even voice recognition is controlled by the CPU as well. Many of these systems are designed to be portable and therefore battery power is often used. This requires low power and operation over a fairly wide range of voltage. These are conditions that Mixed Signal design engineers are well acquainted with.
Implantable medical devices are even more sensitive to power consumption. These devices have to be placed with a surgical procedure so extending the battery life is very beneficial. Implantable devices require extremely low power processes and libraries, low power filters and high performance converters, usually sigma delta. It is important to select a silicon partner with proven low power intellectual property.
Wireless applications are another good fit for Mixed Signal SoCs. Wireless technology, especially low data rate wireless is starting to be common place in just about all areas of our lives. Security systems, medical telemetry and monitoring, keyless entry, wireless sensor networks and even wireless toys can be found everywhere. Today many of the applications are implemented with standard product microprocessors but as competition and higher volumes increase the need for higher levels of integration increases. This is driven both from a cost and reliability stand point.
Many of these applications do not need the bandwidth of a technology like BluetoothTM and are more cost sensitive than the typical BluetoothTM application. Because of the complexity these devices usually require larger processors and large code and data memory. This is over kill for most low data rate applications. IEEE 802.15.4, or Zigbee, can be implemented in a 0.35 micron technology with an 8-bit machine with modest code and data memories.
Smart sensor is one of the most exciting areas of Mixed Signal SoC design in today’s market place. Many of these devices overlap areas already discussed. Mixed signal sensor SoCs are moving toward distributed intelligence in their sensor elements. This move is very prevalent in both the automotive and industrial automation market segments. These however, are examples where the deep sub-micron technologies often are not the best choice. For one thing the analog portion of the design tends to make up most of the die space and these markets demand mature, well-characterized processes. For this reason many of these devices fit quite well in 0.35 and 0.5 micron technologies.
A general smart sensor design can be seen in the diagram below:
The control functions and in some cases even the Digital Signal Processing can be implemented on the microprocessor in an SoC. Integration of all these blocks into a single ASIC minimizes component cost, board space, manufacturing logistics and maximizes reliability. It also increases IP protection, which is a major concern of many equipment suppliers dealing with high volume products.
Sensor interfaces are found in test, measurement and process management applications such as temperature, pressure and flow sensors, gas analyzers and strain gauges. In industrial and factory automation, position indicators and motion detection systems can be found. Building automation and control systems use smart sensors for smoke and fire alarm and detection, magnetic proximity sensors, magnetic card readers and temperature sensing.
Processor Architectures for Mixed Signal Applications
When dealing with Mixed Signal applications the parameters important to all digital designs are just as important. In addition there are some aspects that deserve special attention.
Process Geometries
When is it best to go to a smaller geometry when choosing a technology for your design? As already mentioned low power or high clock rates are a couple of reasons. The other aspect to consider is the amount of digital logic and memory in the design. The digital portions of the design benefit from all the traditional advantages of smaller technology. If the design is highly digital then these advantages will out weigh the disadvantages realized by the analog portions. As sensor and actuator designs gain intelligence their digital and memory content grows. Very often analog designs that fit well in a 0.5 micron technology are done in a 0.35 process just to gain the advantage of a smaller digital section. For a given die size, 0.5 micron is still the most cost effective solution for both piece price and NRE. The size of the analog section is driven by the application, but the digital section will be what moves the design into the smaller technologies. This rational will continue well into the deep sub-micron and copper interconnect processes.
Processor Bit widths
There are some mixed signal SoC applications that clearly need 32-bit performance. Doing the digital signal processing for applications like audio, encoding and even baseband RF in software is very attractive. A designer will benefit from all the usual reasons you implement functionality in software rather than hardware; easy to design, modify and simulate. These applications fit well with a 32-bit machine, and where 32 bit processors are a fraction of a millimeter in 0.18 micron, this is not a major issue. For those applications that are more suited toward 0.5 and 0.35 micron, digital gate counts are still enough of a concern that the size of the processor and memory systems cannot be ignored. For this reason 8-bit processors are most prevalent in these technologies.
It is also important to separate the instruction set size from the data path size. Precision sensing commonly uses word widths of 10 to 14 bits but doesn’t necessarily need an instruction set with 16 bit performance. There are design techniques that can be employed to enhance an 8-bit architecture to easily handle wider word widths. This has the advantage of keeping code size more in line with an 8-bit architecture, which will keep your code store memory as small as possible.
Peripherals
In many Mixed Signal SoC applications the need for a processor is driven by the responsibility of the processor to makes decisions on it’s own or to communicate back with a central controller over some sort of standard communications interface. The common types of peripherals are seen very often for these functions. Timers for handling the time-out features of the protocols, UARTs for serial communications like RS-232 and LIN. Even more elaborate blocks like Ethernet MAC and CAN are common.
Other blocks that are more specific to mixed signal SoCs include digital filters, pulse width modulators and obviously D<A and A>D functions. Just as important as having well designed functions is an easy way to interface these blocks to the processing element. Most of the 32 bit processors have well defined bus structures that are supported by the IP providers but in the 8 and 16 bit area interfacing is much more varied.
Conclusion
Incorporating a processor with analog functionality will enable applications to achieve lower costs through integration, lower power and even higher levels of performance. All of the challenges present in purely digital SoC design are present in mixed signal designs in addition to a greater sensitivity to gate count and memory size.
Acknowledgements
The author would like to thank Jim Bruister, President SoC Solutions of Atlanta, GA and Bill Finch, Vice President, Cast, Inc. for their help in the subject matter described in this paper.
References
“CMOS Analog Circuit Design”, Phillip E. Allen, Douglas R. Holberg. Second Edition, Oxford University Press, 2002.
Bio
Ron Landry is the Manager of the Digital Product design group at AMI Semiconductor, Inc. He has a Bachelors of Science in Electrical Engineering from Oakland University, Rochester, MI and a Masters of Science in Telecommunications from Southern Methodist University in Dallas, TX. Ron has 16 years of experience in circuit board, FPGA and ASIC design.
Dallas, TX USA
Abstract :
This paper discusses several Mixed Signal System on a Chip applications. Examples include Smart Sensors, low data rate RF devices and Medical monitoring devices. The challenges that face the analog designer and how these are balanced with the digital portions are discussed. Presented also are processor architectures and peripheral requirements that fit well with Mixed Signal applications. Lastly, a call for continued investment in 8-bit architectures and integration tool chains is made.
Introduction
It is not hard to realize that almost all applications, when viewed at a system level, are analog in nature. The “Real World” is analog. We hear, see and even feel signals that are continuous with respect to time and amplitude. Even our inventions to mimic the senses, we call them sensors, operate in the analog domain. Once this is realized one can see that the opportunities for Mixed-Signal designs are abundant. In this paper we will explore Smart Sensors, Medical and Low Data rate RF SoCs and discuss some of the challenges brought on by integration of digital and analog circuits on the same semiconductor.
In the industrial market place the traditional electromechanical systems are being replaced by solid-state electronic systems. Many of these systems incorporate the transducer right on the silicon. Magnetic, temperature and light sensing are examples of these. These applications are also being driven to provide an extra degree of intelligence right at the sensing node. The flexibility that is gained by incorporating a microprocessor in the design is being used for intelligent communication over a communications network (protocol), long-term statistical performance monitoring and local in service diagnostic functionality. These additional functions are translating into higher performing and higher reliable sensing systems in the industrial market space.
Medical devices are enjoying the benefits of SoC technologies as well. As more and more medical diagnostic equipment is finding it’s way into the doctor’s office and even the home environment, it is becoming evident that an easy to use interface is mandatory. Driving LCD displays and sensing keypads is easy work for the processor portion of an SoC. Another requirement for many of these applications is battery operation and that certainly means low power. Rechargeable batteries are common place and the supporting analog circuitry is just another requirement that can be filled by a Mixed-Signal SoC. Lastly, many medical devices require high voltage drive capabilities that can only be achieved through analog design techniques.
Low data rate RF devices are finding their way into Medical, Industrial and even automotive applications. These are almost always paired with a microprocessor. Many applications such as telemetry, security, monitoring, keyless entry and sensing do not require the overhead of more complex RF technologies such as Bluetooth. To the contrary, the extra costs involved because of the greater processing and larger memory requirements would be cost prohibitive. In these cases a low data rate solution such as Zigbee (802.15.4) is a much better fit. As you can see there is some overlap of these applications. Low data rate wireless capability is a very useful feature in both industrial sensing and medical monitoring devices. It is important to select a semiconductor partner that has a broad range of expertise when designing a multifaceted SoC.
Mixed Signal Design in Deep Sub-Micron Technologies
There are mixed signal applications at every point on the process technology curve. Applications that are driven by high volume production and also have large digital content are better suited for the deep sub-micron technologies. There are however many applications that are truly better served by the more mature processes.
In order to understand how the larger geometries can be better suited for some Mixed-Signal applications one needs to understand all of the characteristics involved. Here we will discuss 7, although this by no means covers them all. The attributes that are discussed are gate size, parasitics, transconductance, voltages, channel resistances, linearity, noise and modeling.
Gate and memory size in mixed signal applications generally drive cost. This is because most Mixed Signal devices are core limited. This can be quite different than an all digital circuit. Many times the all digital device will have so many IO that the number of pads on the device determines the periphery and therefore the area. This is rarely the case for Mixed Signal devices. For the most part digital cells scale pretty closely to the expected area savings. One would expect a 0.25 micron cell to be 51% smaller than a 0.35 micron cell of equivalent function. This can be seen by inspection of the following formula:
While this holds for digital cells we will see that the analog cells are quite a different story. Because of this the amount of digital content (including memory) is very key in determining the best technology for the application.
Parasitics lessen as the geometry decreases. This is good news for both the digital and analog designer. Understandably this will translate into high bandwidths and data rates. While the magnitude of the parasitic capacitance per gate or resistance of the interconnect is most assuredly lower as geometry decreases, it is also less predictable. This can cause analog modeling problems and highlights the need for careful understanding of the parasitics.
The transconductance characteristic is the relationship between a drain current and the voltage across the gate and source. As the geometry decreases the transconductance gets higher. This is good news for both analog and digital domains in that smaller conductance interacts with capacitance to create smaller bandwidths and therefore lower data rates.
It is well understood that as geometry decreases the voltage limits of the device decrease as well. In the pure digital world this is beneficial in several ways, less power and less radiated emissions. The only down side has been the need for multiple voltage rails on most digital circuits. In the analog domain the power savings is there but reduced range of operation make the design task harder. It is quite common for analog designers to bias their circuits with at VT + 2Von and Vdd – (VT + 2Von). Unfortunately the threshold voltage, VT, does not scale with the geometry. In other words the operating range of voltages gets smaller as the technology shrinks. This means the analog portions of the circuit have to be more tightly controlled which translates to larger, better matched transistors.
Channel resistance gets lower as the technology shrinks. While this may sound like a good thing, and for digital circuits it generally is, this translates to transistors with lower gain in the analog domain. Lower gain may mean more stages in the circuit.
The linearity of smaller geometries also becomes a factor to consider when doing analog design. Often non-linearity problems are solved by increasing the size of the circuit. An example of this can be seen in D>A and A<D converters were the performance of the converter is very much proportional to the size of the circuit.
Noise in circuits implemented in smaller technologies can become problematic for the analog designer. This is usually worsened by the fact that there is usually a large and fast digital circuit that is generating much of the noise. The smaller operating voltage range works against the designer as well. Signal to noise ratio in the analog circuit gets worse because the signal levels go down but the noise levels may actually go up.
Lastly, modeling of analog circuits in smaller geometries has been problematic. Much of this is due to the lower levels of predictability and the nature of the parasitics. Some of it is due to the maturity of the technology as well. This, of course, will improve as the technology develops.
Because of these items listed above it is important to understand that as the process geometry shrinks, the analog actually gets bigger, and definitely harder. This has to be compensated for by increasing the sizes of the transistors, capacitors and resistors used. Moving to smaller technologies should only be done when the performance requirements of the application demands it. For most Mixed Signal SoC devices this will be driven by the digital gate count and the amount of memory in the design. Only when there is significant digital content should smaller technologies be adopted.
Another thing to consider is that some functions can be implemented in either the digital or analog domain. Filtering is a good example of this. A good rule of thumb is if the circuit can be designed digitally in a cost effective manner, keep it digital. Only design analog cells when you have to. This will help to increase your digital content and decrease the analog so the designer can be more aggressive in moving to smaller technologies.
Mixed Signal SoC Applications
Examples of applications that fit well into Mixed Signal SoC technologies are medical devices, low data rate RF and Smart Sensors. All of these applications are usually powered by a some sort of microprocessor and therefore make good candidates for reaching a higher level of integration, an SoC.
Medical devices are becoming more and more abundant as procedures are routinely being conducted in the doctor’s office or even at the patients home. These applications typically require some sort of sensor interface, signal conditioning, digital signal processing and some way of communicating the results outside the device. These designs typically require an ADC or DAC and analog circuits for compensation. The communications to a user display or over some sort of communications network is almost always handled by the processing unit. User input devices such as keypads, keyboards, pointing devices or even voice recognition is controlled by the CPU as well. Many of these systems are designed to be portable and therefore battery power is often used. This requires low power and operation over a fairly wide range of voltage. These are conditions that Mixed Signal design engineers are well acquainted with.
Implantable medical devices are even more sensitive to power consumption. These devices have to be placed with a surgical procedure so extending the battery life is very beneficial. Implantable devices require extremely low power processes and libraries, low power filters and high performance converters, usually sigma delta. It is important to select a silicon partner with proven low power intellectual property.
Wireless applications are another good fit for Mixed Signal SoCs. Wireless technology, especially low data rate wireless is starting to be common place in just about all areas of our lives. Security systems, medical telemetry and monitoring, keyless entry, wireless sensor networks and even wireless toys can be found everywhere. Today many of the applications are implemented with standard product microprocessors but as competition and higher volumes increase the need for higher levels of integration increases. This is driven both from a cost and reliability stand point.
Many of these applications do not need the bandwidth of a technology like BluetoothTM and are more cost sensitive than the typical BluetoothTM application. Because of the complexity these devices usually require larger processors and large code and data memory. This is over kill for most low data rate applications. IEEE 802.15.4, or Zigbee, can be implemented in a 0.35 micron technology with an 8-bit machine with modest code and data memories.
Smart sensor is one of the most exciting areas of Mixed Signal SoC design in today’s market place. Many of these devices overlap areas already discussed. Mixed signal sensor SoCs are moving toward distributed intelligence in their sensor elements. This move is very prevalent in both the automotive and industrial automation market segments. These however, are examples where the deep sub-micron technologies often are not the best choice. For one thing the analog portion of the design tends to make up most of the die space and these markets demand mature, well-characterized processes. For this reason many of these devices fit quite well in 0.35 and 0.5 micron technologies.
A general smart sensor design can be seen in the diagram below:
The control functions and in some cases even the Digital Signal Processing can be implemented on the microprocessor in an SoC. Integration of all these blocks into a single ASIC minimizes component cost, board space, manufacturing logistics and maximizes reliability. It also increases IP protection, which is a major concern of many equipment suppliers dealing with high volume products.
Sensor interfaces are found in test, measurement and process management applications such as temperature, pressure and flow sensors, gas analyzers and strain gauges. In industrial and factory automation, position indicators and motion detection systems can be found. Building automation and control systems use smart sensors for smoke and fire alarm and detection, magnetic proximity sensors, magnetic card readers and temperature sensing.
Processor Architectures for Mixed Signal Applications
When dealing with Mixed Signal applications the parameters important to all digital designs are just as important. In addition there are some aspects that deserve special attention.
Process Geometries
When is it best to go to a smaller geometry when choosing a technology for your design? As already mentioned low power or high clock rates are a couple of reasons. The other aspect to consider is the amount of digital logic and memory in the design. The digital portions of the design benefit from all the traditional advantages of smaller technology. If the design is highly digital then these advantages will out weigh the disadvantages realized by the analog portions. As sensor and actuator designs gain intelligence their digital and memory content grows. Very often analog designs that fit well in a 0.5 micron technology are done in a 0.35 process just to gain the advantage of a smaller digital section. For a given die size, 0.5 micron is still the most cost effective solution for both piece price and NRE. The size of the analog section is driven by the application, but the digital section will be what moves the design into the smaller technologies. This rational will continue well into the deep sub-micron and copper interconnect processes.
Processor Bit widths
There are some mixed signal SoC applications that clearly need 32-bit performance. Doing the digital signal processing for applications like audio, encoding and even baseband RF in software is very attractive. A designer will benefit from all the usual reasons you implement functionality in software rather than hardware; easy to design, modify and simulate. These applications fit well with a 32-bit machine, and where 32 bit processors are a fraction of a millimeter in 0.18 micron, this is not a major issue. For those applications that are more suited toward 0.5 and 0.35 micron, digital gate counts are still enough of a concern that the size of the processor and memory systems cannot be ignored. For this reason 8-bit processors are most prevalent in these technologies.
It is also important to separate the instruction set size from the data path size. Precision sensing commonly uses word widths of 10 to 14 bits but doesn’t necessarily need an instruction set with 16 bit performance. There are design techniques that can be employed to enhance an 8-bit architecture to easily handle wider word widths. This has the advantage of keeping code size more in line with an 8-bit architecture, which will keep your code store memory as small as possible.
Peripherals
In many Mixed Signal SoC applications the need for a processor is driven by the responsibility of the processor to makes decisions on it’s own or to communicate back with a central controller over some sort of standard communications interface. The common types of peripherals are seen very often for these functions. Timers for handling the time-out features of the protocols, UARTs for serial communications like RS-232 and LIN. Even more elaborate blocks like Ethernet MAC and CAN are common.
Other blocks that are more specific to mixed signal SoCs include digital filters, pulse width modulators and obviously D<A and A>D functions. Just as important as having well designed functions is an easy way to interface these blocks to the processing element. Most of the 32 bit processors have well defined bus structures that are supported by the IP providers but in the 8 and 16 bit area interfacing is much more varied.
Conclusion
Incorporating a processor with analog functionality will enable applications to achieve lower costs through integration, lower power and even higher levels of performance. All of the challenges present in purely digital SoC design are present in mixed signal designs in addition to a greater sensitivity to gate count and memory size.
Acknowledgements
The author would like to thank Jim Bruister, President SoC Solutions of Atlanta, GA and Bill Finch, Vice President, Cast, Inc. for their help in the subject matter described in this paper.
References
“CMOS Analog Circuit Design”, Phillip E. Allen, Douglas R. Holberg. Second Edition, Oxford University Press, 2002.
Bio
Ron Landry is the Manager of the Digital Product design group at AMI Semiconductor, Inc. He has a Bachelors of Science in Electrical Engineering from Oakland University, Rochester, MI and a Masters of Science in Telecommunications from Southern Methodist University in Dallas, TX. Ron has 16 years of experience in circuit board, FPGA and ASIC design.
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