Platform-Based Design and Verification with Automated IP Integration

System-on-chip (SoC) platforms provide an opportunity to resolve the productivity and verification challenges inherent in SoC creation. In earlier approaches, platform-based design required a substantial amount of work to transform an assortment of intellectual property (IP) into a specific design — including the resource-intensive and time-consuming tasks of setting up the tools and testbenches required to configure, verify and optimize the design.

Experienced SoC designers have discovered that much of the tedious, manual effort can be automated, however, since the information to integrate IP for design and verification has already been specified in various IP data books.

It has been difficult to realize the potential of automation, however, hampered as it has been by the great variety of IP and because documentation and packaging formats vary widely between IP providers. In addition, the techniques for describing IP were generally machine-interpretable techniques, which led to incompatible information domains. As a result, the sheer volume of disparate information required to hook up all aspects of the IP into a system design made it easier to set up verification tasks manually rather than normalize the data for automation.

Recognizing this, Mentor Graphics invested in research and development and announced in 2002 an extensible XML-based design creation and verification tool called Platform Express. Meanwhile, several major systems IP solutions providers, including ARM and Philips Semiconductors, independently concluded that XML support for complex IP configuration and integration was needed.

The Structure for Packaging, Integrating and Re-using IP within Tool-flows (Spirit) consortium was created in 2003 to develop a standard for more efficient integration of IP in SoC platform designs.

This confluence of ideas and goals reached a major crossroads in June 2004 with the rollout of the Spirit Consortium XML schema standard for IP. A schema is the set of rules for organizing data in XML.

Founded in June 2003, the Spirit consortium (www.spiritconsortium.com) adopted a schema based on this same XML technology. The consortium has further developed and standardized XML through a group of leading EDA, IP and semiconductor vendors, including ARM, Cadence, Mentor Graphics, Philips, STMicroelectronics and Synopsys.

In June 2004 the Spirit Consortium released a proposed Spirit 1.0 standard for IP. The Spirit standard XML is being validated against encapsulation of IP from several vendors as well as for machine interpretation in several EDA vendor flows. This standardization is critical to interoperability based on metadata descriptions and enables IP providers to bundle a single, industry-recognized format with their IP.

An IP Integration standard

In documenting IP, the use of XML for the description of component and system designs has two key advantages.

• It is an open, extensible data standard controlled and maintained by the World Wide Web Consortium. XML data can be read, exchanged and converted for many different classes of applications.
• Many tools, class libraries and development environments already support XML-based tool development in many different software languages. This means XML-based tools can be developed quickly and efficiently.

Having IP creators construct data books according to a standard schema makes it possible for tools to process this data in a useful and consistent manner. The schema-based information can also reference other schemas, so there is little possibility of it outliving its usefulness as the world of IP creation evolves.

Automating

Delivering IP with a standard data format is the first important step in automating IP use in a specific tool flow. Equally important are generators, which are code modules specified in the XML descriptions that are relevant for design objects: The generators extract process and design data from the data book for IP configuration tools, such as Mentor's Platform Express.

Written by the IP owners, EDA tools companies and the design community, some generators are IP dependent, some tool dependent and some intent dependent. Creating a design requires literally hundreds of generators, each performing one well-understood task very well. The combination of all of the generators running together gives a platform-based design tool, such as Platform Express, its overall functionality and utility.

The combination of XML data books and a suite of generators means that even under the most demanding definition of reuse, IP is truly reusable in many different design environments.

See related chart A three-step process for IP integration starts with the IP selection, in this case from the Inventra IP library. Next the configure generator is run, which occurs automatically in Platform Express. This is followed by the instantiation process, which commences after clicking "Build." Source: Mentor Graphics

A three-step process for IP integration is shown (see figure). It starts with the selection of the IP (in this case from Mentor's Inventra IP library); the configure generator then runs (which run automatically in Platform Express); and finally the instantiate step is performed (i.e., click Build).

Designers start by browsing a library of available IP cores, memory and peripherals, then simply drag and drop them in the graphical editor and connect them using identified buses. One of the key advances in creating reusable IP has been the emergence of de facto SoC bus standards. The platform-based design tool generates all the detailed connection information between components and the bus (for instance, a complete synthesizable RTL implementation of a bus). A memory map display in the Platform Express GUI provides insight into the utilization of address space and other design parameters. Generators run automatically in Platform Express.

The Spirit standard IP descriptions will allow users to exploit the system exploration, integration and validation facility across multiple tools and IP vendors. As the lead environment in the development and support of Spirit-compliant formats, ARM has been successfully utilizing Platform Express for early trials.

The overall platform and derived product development processes of IP creation, verification and integration need to be seamlessly and consistently supported by an automated and integral tool chain, both for internal development teams and for our external customers. The use of XML-based IP data books to interface through a generator to our configurable IP repository has proven both viable and intuitive. The evolution to a Spirit standard will greatly alleviate the costly task of integrating IP from multiple internal and external sources.

John Wilson (john_wilson@mentor.com) is product-marketing manager for the System-on-Chip Platform Design center of Mentor Graphics (UK) Ltd. (Newbury, England).