Flash-based FPGAs serve point-of-sale apps

The substantial growth experienced by the portable point-of-sale (POS) market has combined with the falling cost of wireless networking to make portable POS terminals popular. However, these devices create some interesting challenges for system designers and require attention to several system-design aspects, particularly with respect to power consumption, flexibility and design security.

Typically small and battery-operated, portable POS devices require a small-footprint, low-power, lightweight, single-chip silicon solution. Semiconductors that can implement several system functions, while eliminating many system components, save space and can reduce power consumption and cost. The POS system must be able to communicate with a basestation when necessary or store transactions in internal memory for synchronization later, as well as process keypad or touchscreen/LCD inputs and a small printer. Often, the POS terminal should be capable of printing professional receipts and reading magnetic stripes to process secure credit card transactions.

Another important element in developing POS applications is device customization. While enabling competitive differentiation, customization can allow a single design to be modified to support different standards in different countries. For example, customizing the design to suit particular banking systems in each country is crucial to the POS system, as different regions require specific banking data and record keeping.

The risk of design piracy is also a concern in today's environment. A clever hacker can often copy a design by over-building units or through intellectual-property (IP) theft, making device security a critical consideration. This is a big risk in the market because patents are difficult to obtain and expensive to protect, and POS design involves developing unique intellectual property that needs to be guarded from design IP cloning, reverse engineering and overbuilding.

Because of the need for custom functions and design security, ASICs-and sometimes high-end processors-have traditionally been the vehicle used in the POS market. However, ASICs have their deficiencies. ASIC design can take a long time and has high nonrecurring-engineering (NRE) costs. In today's dynamic market, standards change, competitors innovate and companies cannot afford to wait for an ASIC implementation without the ability to modify components or features in the system. Thus, the ASIC alternative now seems less attractive than it used to. In some cases, when extremely high-volume product is involved, NRE investment can be justified in the long run. However, volumes in the POS market are rarely high enough.

No NRE charges
An FPGA-based solution could address some of the deficiencies of ASICs. However, due to space, power and security limitations, SRAM-based FPGAs have typically not been considered for POS applications. The increase in availability of flash-based FPGAs has created a solution with the performance, security, size and power consumption advantages of an ASIC, but also the benefits of reprogrammability, fast time-to-market and ease of design, all without NRE charges.

Like ASICs, flash-based FPGAs are single-chip, live at power-up, offer high performance and consume little power. These FPGAs are also reprogrammable, thereby minimizing design-alteration risk. With the ability to store user configuration data on-chip, flash technology also offers enhanced security from design piracy and saves money and space.

As a single-chip solution, flash-based FPGAs create savings in board space and reduced power consumption, both of which are ideal for battery-operated POS terminals. The live-at-power-up feature of flash-based FPGAs benefits the design by further reducing the number of components, such as clocking devices. The fact that the device does not require programming at power-up also eliminates the power surge usually seen at power-up in SRAM-based FPGAs.

Flash-based FPGAs can also provide better security protection than ASICs as read back of the flash configuration can be disabled, making the device immune to reverse engineering or theft. SRAM FPGAs, by contrast, require loading of the configuration file every time the system powers up, which makes the design susceptible to IP cloning and reverse engineering.

In a typical POS system, it is common to implement the core system using the flash-based FPGA. The FPGA can integrate a soft IP core, such as an 8-bit 8051 microcontroller, which communicates with the internal user nonvolatile memory and interfaces to external user, printer or memory interfaces. In addition, the FPGA can communicate with an external wireless communications application-specific standard product and with a programming mechanism via a JTAG interface. The inherent FPGA features of clock-conditioning circuitry can help modify and generate clocks for the system, and I/O functionalities can be used to monitor and supervise the system.

Flash FPGAs address multiple design and product aspects for POS systems and are a natural choice to use as the foundation of the design.

Hezi Saar (hezi.saar@actel.com) is product-marketing manager for Actel Corp. (Mountain View, Calif.).

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