D&R Industry Articles (April 2006)

Articles for the Week of April 24, 2006

• Video content protection using secure embedded non-volatile memory for HDMI with HDCP
• FPGA Prototyping as a Verification Methodology
• How to lower the cost of PCI Express adoption by using FPGAs
• Using dynamic run-time scheduling to improve the price-performance-power efficiency of heterogeneous multicore SoCs

Articles for the Week of April 17, 2006

• Start your crypto engine--cryptographic acceleration in SoCs
• Challenges in PCI Express IP Implementation
• Get the right mix when integrating Power Management Solutions into SoCs
• How to build reliable FPGA memory interface controllers without writing your own RTL code!
• Combining FPGAs and DSPs to get the best performance
• A hierarchy of needs for SoC IP reuse
• Can the chip design - verification divide be plugged in with some knee jerk band aid type strategies?
• Send your 3D graphics content over OCP

Articles for the Week of April 10, 2006

• FPGAs and Structured ASICs: Low-Risk SoC for the Masses
• Video processor basics for consumer applications
• Using complex triggers in an FPGA-based RTL debugger
• Transactional Level Modeling (TLM) of a High-performance OCP Multi-channel SDRAM Memory Controller
• Platform FPGA design for high-performance DSPs
• SoC processor is set for the big picture
• Implementation of a SystemC Assertion Library
• Streaming multimedia codecs on embedded/programmable DSPs
• Adapting signal integrity to nanometer IC design
• Design an all-digital modulator with an RF output

Articles for the Week of April 3, 2006

• Analog IP Reuse in Nano Technologies
• DSP design flows in FPGAs: Strategies for designing DSP applications for FPGAs
• Using programmable processor array chips for algorithmic-intensive tasks
• Lower your handset's software costs
• Transaction Level Model of IEEE 1394 Serial Bus Link Layer Controller IP Core and its Use in the Software Driver Development
• FPGA partial reconfiguration mitigates variability