D&R Industry Articles (July 2013)
Articles for the Week of July 29, 2013
Design and Implementation of SD Host Controller IP Core
This paper discusses a method to design an SD Host Controller IP Core that can be implemented on FPGAs. FPGAs are being widely deployed in various applications including industrial, commercial and military applications. Secure Digital is the most widely used portable memory standard. Its ultra-compact and rugged architecture, simple interface, high security, low power consumption, reliable operation and interoperability have made it the de-facto solution for portable storage. The IP Core is designed in accordance with SD Host Controller Specification 3.0 and implements many advanced features. The IP Core is developed, implemented and tested and the performance obtained matches industry standards.- Semiconductor industry strengths and weaknesses in the Asia Pacific region
- A Novel Approach for improving OCV impact earlier in the design cycle
- Powering SoCs: Where Do the Regulators Go?
Articles for the Week of July 22, 2013
Additional ArticlesArticles for the Week of July 15, 2013
Are we too Hard for Agile?
In this paper we first give an overview of agile development and discuss the advantages that software developers report from deploying an agile development methodology as well as the potential pitfalls. We then describe the author’s experiences of applying agile development techniques for hardware development as well as those reported in the literature. Finally we consider the applicability of agile to hardware development. The aim of the paper is to give the reader the knowledge and insight into how they can potentially apply agile within their own projects.- Navigating successful USB 3.0 compliance
- Clock Gate Logic Aware Design Closure
- Design planning for large SoC implementation at 40nm - Part 2
Articles for the Week of July 8, 2013
Silicon Intellectual Property - Delivering value to customers
With many IP vendors in the market, the question is what really adds value to customers and help them choose the right vendor. How can an IP centric focus with services built around IPs can deliver value to customers?Articles for the Week of July 1, 2013
Design IP Faster: Introducing the C~ High-Level Language
In this paper, we introduce a new high-level, dataflow programming language called C~ (“C flow”) that further increases productivity by raising the level of abstraction from behavioral descriptions, while overcoming the limitations of C for hardware design. We present the syntax and semantics of this language, and the framework that provides hardware and software code generation. This paper illustrates the benefits of using C~ for hardware design of a IEEE 802.3 MAC, synthesized for FPGA and for 90nm CMOS technology.