D&R Industry Articles (February 2021)

Featured Article

Specifying a PLL Part 3: Jitter Budgeting for Synthesis

This white paper is aimed at system architects and physical implementation leaders working on the design of SoCs. It can be confusing to understand the impact of different jitter sources and how to calculate a jitter budget when specifying a digital system. This white paper explains how jitter changes the period of a clock and how to ensure that jitter has correctly been accounted for in the calculations for timing closure.

Featured Article

Enabling AI Vision at the Edge

Computer vision has made tremendous advances in the last several years due to the proliferation of AI technology. The intersection of big data and massive parallel computing changed the way in which machines are programmed to understand unstructured 2D and 3D data, such as video feeds from cameras.

Featured Article

Retiming USB4 over USB-C

The USB-C connector is the one connector to rule them all. It has wonderful flexibility in its definition and has been widely adopted across different