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Embedded Systems Articles

• Down & dirty with HW/SW co-design: Part 4 – Multi-objective optimization (Jun. 23, 2011)
  In this four part series, Wayne Wolf takes a full spectrum look at the total hardware/software co-design process & the tools and methodologies embedded designers must learn, or relearn as the two disparate methodologies begin to merge. Part 4: Multi-objective optimization
  
  
• Down & dirty with HW/SW co-design: Part 3 - Cosynthesis of multiprocessors (Jun. 23, 2011)
  In this four part series, Wayne Wolf takes looks at the total hardware/software co-design process & the techniques embedded designers must learn, or relearn as the two disparate methodologies begin to merge. Part 3: Co-synthesis of multiprocessors
  
  
• Managing intelligent I/O processing on DSP + GPP SoCs (Jun. 13, 2011)
  This Product How-To article about TI’s OMAP-L138 C6-Integra DSP + ARM processor details the steps a developer needs to follow in building an application that must balance I/O processing tasks between a general purpose microcontroller and a digital signal processor.
  
  
• Improving USB 3.0 with better I/O management (Jun. 13, 2011)
  This article explores the impact of USB 3.0 on mobile handheld hardware and software design and what can be done, through proper I/O management, to improve interactions between USB 3.0 connected components.
  
  
• Software and hardware challenges due to the dynamic raw NAND market (Jun. 13, 2011)
  Developers commonly face difficulties developing and maintaining firmware, middleware and hardware IP for interfacing with raw NAND devices.
  
  
• Making hardware more like software (May. 30, 2011)
  Here's a way to partially or fully reconfigure an FPGA without rebooting the operating system.
  
  
• Securing nonvolatile, nonresettable counters in embedded designs (May. 16, 2011)
  EEPROMs that include EPROM-emulation mode are the product of choice for implementing nonvolatile, nonresettable counters. The serial number of the memory chip can be used to detect tampering.
  
  
• Optimize data flow video apps by tightly coupling ARM-based CPUs to FPGA fabrics (May. 12, 2011)
  In this Product How-To design article, iVeia’s Michael Fawcett describes how combining an ARM-based TI OMAP CPU and Xilinx FPGAs can be used to design a system for handling rich data-flow video processing apps via the inherent parallel structure of an FPGA fabric.
  
  
• DSPs with PCI Express interface extend connectivity while improving performance and power efficiency (Apr. 28, 2011)
  For years, we’ve had the PCIe interfaces on everything from high-end CPUs, GPUs, embedded processors and consumer-focused devices. Less known is the presence of PCIe on DSPs and whereas in the past DSPs had either proprietary interfaces or sRIO, today’s DSPs have the PCIe interface, giving designers and end-users more options for connectivity at lower price. This article looks at this emerging blend of PCIe and DSP technology, provide examples of usage models and explain its functional and ease-of-design advantages for products/systems using DSPs.
  
  
• Challenges of safety-critical multi-core systems (Apr. 25, 2011)
  In this article, the challenges involved in migration to multi-core processor architectures are reviewed in the context of the particular ones related to their use in safety-critical systems.
  
  
• Analyzing multithreaded applications - Identifying performance bottlenecks on multicore systems (Apr. 11, 2011)
  Various aspects preventing applications from achieving theoretical maximum utilization of multicore resources include: operating system (scheduling, synchronization, etc.), application code (parallelization factor, data/function decomposition, etc.), and hardware architecture scalability (cores, memory subsystem, interconnects, etc.).
  
  
• CORTEX-R versus CORTEX-M (Apr. 07, 2011)
  Cortex-R and cortex-M series is targeted for different requirements and for different applications. It is important to know the parameters and features that separates them as there could be applications where both of them can fit in. This paper is targeted for such a scenario and helps the Designers for selection. The final objective is to help the Designers or Developers to have understanding of Architectures of ARM.
  
  
• CoreMark: A realistic way to benchmark CPU performance (Mar. 01, 2011)
  CoreMark ties a performance indicator to execution of simple code, but rather than being entirely arbitrary and synthetic, the code for the benchmark uses basic data structures and algorithms that are common in practically any application.
  
  
• Cortex-M And Classical Series ARM Architecture Comparisons (Feb. 28, 2011)
  ARM has introduced many processors. Each set or groups of processors are having different core and different Features. A new entrant or Designer to the ARM can make use of this paper for easy understanding and choose a processor that is well suited for the requirements. This paper gives brief comparison of the Architectures.
  
  
• Architecting hardware, software & communications for the electronic battlefield (Jan. 04, 2011)
  Deepak Shankar of Mirabilis describes how to map standard contract requirements on an embedded mil/aero application using high-level system simulation, illustrating his article with a variety of on line live Web demos.
  
  
• Only 10 days to shipping ... we may have a memory problem! (Dec. 22, 2010)
  This paper describes how software development engineers using OMAP, Sitara, QorIQ, PowerQUICC, and PowerPC processors can fully validate their hardware platform and integrate their final application prior to customer shipment.
  
  
• Why modems are going soft (Dec. 08, 2010)
  A new approach to modem development separates the modem-specific software from the hardware and, therefore, has a profound impact on the platform design flow
  
  
• Dynamic Memory Allocation and Fragmentation in C and C++ (Dec. 06, 2010)
  In C and C++, it can be very convenient to allocate and de-allocate blocks of memory as and when needed. This is certainly standard practice in both languages and almost unavoidable in C++. However, the handling of such dynamic memory can be problematic and inefficient. For desktop applications, where memory is freely available, these difficulties can be ignored. For embedded - generally real time - applications, ignoring the issues is not an option.
  
  
• Design nvSRAM into PLC applications (Nov. 22, 2010)
  A Programmable Logic Controller (PLC) is a specialized computing system widely used to control real-time industrial processes and assemblies.
  
  
• USB 3.0: Delivering superspeed with 25% lower power (Nov. 10, 2010)
  USB 3.0 offers new opportunities to boost battery life for both host and endpoint functions thanks to comprehensive power management features that operate autonomously at the hardware level.
  
  
• Reliable programming in ARM assembly language (Nov. 08, 2010)
  Sometimes it's necessary to use both assembly and high-level programming languages when working in the ARM architecture. This paper from ARM TechCon explains why and how.
  
  
• Efficient C code for ARM devices (Nov. 08, 2010)
  Our industry moves incredibly quickly. The hot topic last year is very rarely so important this year – either we will have solved it or some other issue will have risen to even greater prominence. The issue of efficiency, however, has been a relatively constant theme through my time in the industry, now some 24 years but efficiency has had many faces over that time.
  
  
• A developer's insight into ARM Cortex M debugging (Nov. 04, 2010)
  A software developer describes tips and tricks for using the built-in debugging options on the ARM Cortex M microcontroller.
  
  
• Designing modern USB audio systems (Nov. 01, 2010)
  USB audio is a ubiquitous interface supported by all but the most ancient personal computer hardware and operating systems. Today's successful USB-based audio products are the result of a lot of chip- and system-level attention to solving the thorny problem of clock recovery.
  
  
• Power management ICs: meeting new design paradigm challenges (Oct. 28, 2010)
  Understand the changing function of PMICs and the processes used to implement them.
  
  
• Making the shift to optical interconnect with PCIe Gen3 (Oct. 28, 2010)
  This tutorial looks at the benefits of PCIe Gen3 as an optical interconnect, in the context of the copper dilemma, optical fibers and pertinent advances in optical technology, such as LightPeak, and the cost/power tradeoffs.
  
  
• Two keys to success in Tablet PC design (Oct. 21, 2010)
  Rising interest in consumer and user-generated mobile video – coupled with growing demand for higher resolution – is creating a challenge for tablet design. Devices will need to handle large amounts of data quickly in order to satisfy consumer expectations. Two keys to meeting this need are enhanced USB connectivity and off-loading data tasks from the CPU.
  
  
• Using Video-0ver-USB for High Definition recording on mobile handsets (Oct. 18, 2010)
  To deal with the challenges of delivering HD video on mobile handsets,, a USB Audio Video Class needs to be defined within the Universal Serial Bus specification to standardize Video-over-USB technology.
  
  
• Supporting LTE and multiple standards with SDR (Oct. 14, 2010)
  The demand for mobile broadband and data services is growing rapidly driven by the sales of smartphones and other connected devices. LTE, the fourth generation mobile network technology, promises to meet that demand with multi megabyte connections for mobile subscribers.
  
  
• Bridging the gap between custom ASICs and ARM-based MCUs (Oct. 05, 2010)
  One perspective for thinking of the embedded world is as a spectrum of complexity ranging from ASIC to MCU. ASIC designs are enormously expensive and take years to complete but the potential for innovation is almost unbounded. MCU projects are almost free in comparison and take months or even just weeks to finish, but they are limited by the third-party chips they run on.