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Embedded Systems Articles

• Simulation - better than the real thing? (Jul. 08, 2013)
  With a complex embedded system, work needs to start on the software long before the hardware is available. Indeed, it may be necessary to begin even before the hardware design is finalized. Because software engineers need to test their code as they go along, they need an execution environment from day 1. Numerous options are reviewed in this article, with a particular focus on simulation technologies.
  
  
• Managing Requirements Tracking, Implementation and Sign-off for Embedded Systems (May. 27, 2013)
  This document describes the issues faced when building hardware and software systems where the success of the project is dependant on requirements being fully supported and tested. Where the cost of failure is high there is a greater necessity for a robust requirements sign‐off capability. This particularly applies to systems where the financial cost of recalling a failing product is prohibitive and/or there is a high safety factor which is typical of embedded systems.
  
  
• Using a PCIe over Cabling-based platform to create hybrid FPGA/virtual platform prototypes (May. 22, 2013)
  In this Product How-To design article, Tom Scott of Synopsys describes how to use the PCIe-over-Cabling interface in its HAPS-60-based system to create a new class of hybrid prototypes. The prototypes make use of a transaction-level interface to a SystemC/TLM virtual platform that combines both hardware and software-based prototyping methods.
  
  
• Improving ASIP code generation and back-end compilation: Part 2 (Apr. 29, 2013)
  In a two part article from High Performance Embedded Computing, author Wayne Wolf provides a review of some of the most effective ways to improve the code performance and reliability. Part 2: instruction selection and modeling and code placement.
  
  
• Hardware (and software) implications of Endianness in SoC design (Apr. 08, 2013)
  In this article, we will review the concept of endianness from a software standpoint and will then discuss the implications of endianness for designers of hardware IP blocks and developers of device drivers when they work with a complex system such as today’s SOC.
  
  
• A Redbox on an "All Programmable SOC" (Mar. 11, 2013)
  A PRP/HSR Redbox has been implemented on ZYNQ, using NetModule's modular PRP/HSR IP-core deployed on the proprietary "Zynq4Ethernet" platform which provides 5 Ethernet ports. Most of the Link Redundancy Entity has been implemented in the Programmable Logic section but management and supervision functions which are not time critical are executed in software. This solution has sufficient performance to operate not only at 100 Mb but also at Gigabit speed. It consumes about 25% of the programmable logic resources of an XC7Z020 chip.
  
  
• Using the H.264 specification for anywhere, anytime placeshifted video (Feb. 25, 2013)
  
  
  
• 10 software tips for hardware engineers (Jan. 31, 2013)
  
  
  
• Overcoming the embedded CPU performance wall (Jan. 22, 2013)
  The physical limitations of current semiconductor technology have made it increasingly difficult to achieve frequency improvements in embedded processors, and so designers are turning to parallelism in multicore architectures to achieve the high performance required for current designs. This article explains these silicon limitations and how they affect CPU performance, and indicates how engineers are overcoming this situation with multicore design.
  
  
• Optimizing efficiency and flexibility in DSP systems (Jan. 14, 2013)
  Increasingly, GPPs (general purpose processors) and CPUs (central processing units) have acquired capabilities to realize DSP algorithms, offering a platform to mix non-DSP functions like network stacks with complex DSP algorithms on the same CPU. This article will explore the tradeoffs leading designers to these different design choices.
  
  
• Making wireless MIMO equalization more efficient with a multiprocessor DSP SoC (Jan. 02, 2013)
  This article describes the use of the Freescale Qonverge B4860 system-on-chip (SoC) with integrated StarCore SC3900 DSP cores to implement a 4x4 LTE MIMO (multiple-input and multiple-output) Equalizer. Performance is futher enhanced through the use of an on-chip high-speed Equalizer Processing Element accelerator.
  
  
• S Parameters for PCB Simulation and Verification (Dec. 03, 2012)
  To ensure that the signal is transmitted from one end to other on the PCB without distortion, an advance analysis on signal integrity is required. This can help in understanding and characterizing the system for optimal performance.
  
  
• Designing low-energy embedded systems from silicon to software (Dec. 03, 2012)
  Low-energy system design requires attention to nontraditional factors ranging from the silicon process technology to the software that runs on microcontroller-based embedded platforms. Closer examination at the system level reveals three key parameters that determine the energy efficiency of a microcontroller: active-mode power consumption; standby power consumption; and the duty cycle, which determines the ratio of time spent in either state and is itself determined by the behavior of the software.
  
  
• Alternative NVM technologies require new test approaches, part 2 (Nov. 21, 2012)
  Part 2 of this article addresses the testing challenges associated with another emerging NVM technology, ferroelectric memory (FRAM).
  
  
• ARM vs incumbent microprocessor architectures (Nov. 15, 2012)
  Parts one, two, and three of this series offer a brief overview of the processor architecture ecosystem, identify and map the processing sweet-spot spectrum of mainstream processing architectures, and cover the issues addressed by low-power, small-data-width processors. This part discusses how incumbent microprocessor architectures can compete with ARM-based processors.
  
  
• Android hardware-software design using virtual prototypes - Part 2: Building a sensor subsystem (Nov. 08, 2012)
  In the second of a three-part series of articles on virtual prototyping, Achim Nohl explains how to use the Synopsys Virtualizer Development Kit (VDK) and describes the hardware/software integration flow for a sensor subsystem for use in an Android mobile device. For the remainder of this series, we will illustrate virtual prototyping usage and early software development by means of a brief case study. The case study is centered on a multi-function sensor controller subsystem which supports an accelerometer, magnetic field, orientation, gyroscope, light, pressure, temperature, and proximity.
  
  
• Benchmarking an ARM-based SoC using Dhrystone: A VFT perspective (Nov. 05, 2012)
  The authors describe the development of a self-checking, result-signaling, tester pattern version of the popular Dhrystone benchmark. Their method generates useful performance numbers from an ARM-based SoC that can be used in a tester environment to correlate with the performance predicted by architectural analysis and RTL simulations.
  
  
• Leverage video for auto electronics design (Oct. 30, 2012)
  “Where is the V in AVB?” asked a thread in the Audio/Video Bridging (AVB) LinkedIn group. This caught my eye. While it is a popular and growing product in Synopsys' Ethernet portfolio, it’s critical to understand how customers choose to use it.
  
  
• ARM-based Android hardware-software design using virtual prototypes - Part 1: Why virtualize? (Oct. 29, 2012)
  
  
  
• One processor to rule them all? (Oct. 18, 2012)
  This series of articles on processor architectures asks, "Can a single processor architecture do it all, and if so, would it be a good idea?" Part one begins with a brief overview of the processor architecture ecosystem.
  
  
• Cortex-A9 Processor Optimization Pack (Oct. 17, 2012)
  The ARM Cortex-A family of processor cores is gaining traction and success in many applications such as set-top box, smart phones, mobile computing, gaming, DTV and many different ‘internet connected’ devices. In a number of applications, it is not only important to drive multi-processor capability, but to improve single-threaded performance.
  
  
• Big.LITTLE software is not so hard (Oct. 09, 2012)
  One of the questions I get asked most often about ARM big.LITTLE processor technology is, "how complicated is the software?"
  
  
• Toward a two-processor world (Oct. 08, 2012)
  Since Intel makes only about 2% of the world's microprocessor chips, that leaves a big 98% for everyone else. Those are all the embedded processors, and it's a fragmented market. There are gobs of 8-bit and 16-bit MCUs out there, from dozens of different chipmakers. But it looks like the 32-bit world is coalescing around just two: ARM and x86.
  
  
• Validating Software in Commercial Smart Transmitter for Safety-Critical Applications (Sep. 17, 2012)
  Industries, including nuclear industries, depend on the transmitters (for monitoring process parameters) that are available in the market from reputed manufacturers. This work aims at answering the question of how to validate and qualify a smart transmitter, containing pre-developed software (PDS) in it, for its suitability in safety-critical application when there is no access to the software development process documentation.
  
  
• Wireless connectivity protocols for embedded systems (Sep. 10, 2012)
  In this article I'll introduce wireless terminology and basic design considerations, explain popular connectivity options such as Wi-Fi, Bluetooth, ZigBee and others, and examine hardware and software trade-offs, including design strategies, for easily and quickly incorporating wireless connectivity into an embedded design.
  
  
• How FPGAs, multicore CPUs, and graphical programming are changing embedded design (Sep. 06, 2012)
  In this Product How-to article, Sanjay Challa of National Instruments provides an overview of how the combination of FPGAs, multicore CPUs and graphical programming environments such as the company’s LabView are changing the nature of embedded systems design.
  
  
• Deciphering phone and embedded security - Part 4: Ideal platform for next-generation embedded devices (Sep. 03, 2012)
  Deciphering phone and embedded security - Part 4: Ideal platform for next-generation embedded devices Mohit Arora, Sr. Systems Engineer and Security Architect, Freescale Semiconductor 8/31/2012 5:05 PM EDT [Part 1 covers the general Android architecture, including a look at the basic Android platform and the associated framework, as well as commonly used terminology like "rooting" and "flashing." Part 2 takes a deep dive into what really happens at the hardware level during an unlock operation, and tricks that hackers use to fool or bypass bootloaders and install custom ROMs. Part 3 covers various flavors of bootloaders that are offered by the manufacturer to provide levels of protection/security and the way some of them get compromised.] This is the fourth article in a series and the final one; the first three articles focused on understanding hardware and software aspects of the Android/open system, associated components, along with how hackers bypass security mechanisms to unlock phones as well as defeat security mechanisms in order to get a root access and install custom ROM to customize a phone to suit their needs. Due to the open nature of Android OS, manufacturers will always be under pressure to provide a mechanism that will allow Android developers to install custom ROMs, which is one of the main attractions for many developers adopting Android. On the other hand, this will always keep a check on security measures that are deployed to be able to meet the best of both the worlds (enough security to protect the consumers that will never customize their phone versus capability to unlock and load custom ROM for developers who wants to customize their phones) versus what could have been done further to strengthen security measures and avoid manipulations. Leveraging the security solutions described earlier in this series, let's apply them to embedded products other than mobile phones, that do not have this manufacturer dilemma and are mainly concerned with providing reasonable security.
  
  
• Verifying embedded software functionality: Combining formal verification with testing (Aug. 30, 2012)
  In the final part in a four part series Abhik Roychoudhury explains the usefulness of formal verification techniques to traditional software testing techniques
  
  
• Managing the 8- to 32-bit processor migration (Aug. 30, 2012)
  With apologies to Jonathan Swift, engineers have revised the Lilliputians’ argument to debate which end of a number—the largest (big-endian) or smallest (little-endian)—should come first in memory. There are valid arguments on both sides of the “endianness,” or byte-order, debate, but this article focuses on the ramifications for developing applications using C code.
  
  
• How to avoid a USB meltdown in harsh environments (Aug. 27, 2012)
  Brian Foster of B&B Electronics points out that like the Hindenburg, USB has potential trouble designed in. This article discusses the problem, and what can be done to remedy it.