High Performance 64-bit RISC-V Multi-Core Application Processor
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Embedded Systems Articles
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Taking advantage of the Cortex-M3's pre-emptive context switches (Dec. 13, 2011)
The ARM Cortex-M3 (CM3) architecture is a 32-bit microcontroller core designed to replace many 8-bit and 16-bit devices by offering faster speeds and advanced system features.
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Keeping time on 40/100G networks with high-performance clocks (Dec. 13, 2011)
In this Product How-To article, James Wilson of Silicon Labs describes the clocking requirements in next generation 10G to 100G networks using high speed optical links and how the company’s Si5374/Si5375 clock ICs can be used to satisfy the needs for any-frequency synthesis, jitter attenuation, clock generation and clock distribution.
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Public key cryptography and security certificates (Dec. 05, 2011)
This article explains public key cryptography and the role of security certificates and the way they are used by the secure protocols to provide ultimate security.
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Securing your apps with Public Key Cryptography & Digital Signature (Nov. 23, 2011)
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Selecting 8-bit MCUs: A practical guide (Nov. 22, 2011)
Many devices may be available that will do the job, but tailoring the selection tightly to your particular needs can make for a much smoother ride in the long run.
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A new wave in wireless: Small cells for a heterogeneous network (Nov. 18, 2011)
The latest releases of the LTE specifications include the concept of the Heterogeneous Network (HetNet), which will rely heavily on System-on-Chip (SoC) integration to handle the computational complexity of many different types of small cell Evolved NodeB (eNodeB) LTE base stations.
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Hardware/software design requirements planning: Part 4 - Computer software approaches (Nov. 14, 2011)
In this series of articles, Jeffrey O. Grady, author of “System Verification,” delineates the basics of requirements planning and analysis, an important tool for using Agile programming techniques to achieve better code quality and reliability in complex embedded systems software and hardware projects. Part 4: Computer software approaches.
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Add graphics without using a dedicated graphics controller (Nov. 09, 2011)
The author describes the various means by which integrated peripherals on a microcontroller along with graphics libraries enable embedded designers to push down costs by driving an LCD display without a graphics controller.
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Hardware/software design requirements planning: Part 3 - Performance requirements analysis (Nov. 09, 2011)
In this series of articles, Jeffrey O. Grady, author of “System Verification,” delineates the basics of requirements planning and analysis, an important tool for using Agile programming techniques to achieve better code quality and reliability in complex embedded systems software and hardware projects. Part 3: Performance requirements analysis.
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Hardware/software design requirements planning - Part 2: Decomposition using structured analysis (Nov. 08, 2011)
Decomposition using structure analysis Structured decomposition is a technique for decomposing large complex problems into a series of smaller related problems. We seek to do this for the reasons discussed earlier.
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Hardware/software design requirements analysis: Part 1 - Laying the ground work (Nov. 07, 2011)
In this series of articles, Jeffrey O. Grady, author of “System Verification,” delineates the basics of requirements planning and analysis, an important tool for using Agile programming techniques to achieve better code quality and reliability in complex embedded systems software and hardware projects.
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Basics of porting C-code to and between ARM CPUs: ARM7TDMI and Cortex-M0 (Oct. 18, 2011)
In the first of a three part series, Joseph Yiu, author of “The definitive guide to the ARM Cortex-M0,” provides some basic guidelines for porting your code base from other 8/16 bit MCUs to ARM and between various ARM processors starting here with the ARM 7TDMI and Cortex-M0.
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Time carefully the adoption of your next-generation processor (Oct. 10, 2011)
Can you maximize first-to-market opportunities and minimize the extra risks of early adoption?
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Validating your GNU platform toolchain: tips and techniques (Oct. 03, 2011)
Open-source tools for your open-source Android/Linux platform.
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Understanding Android's strengths and weaknesses (Sep. 29, 2011)
Here are techniques for exploiting Android's strengths and managing its limitations, especially in hard real-time, mission-critical systems.
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xLuna: a Real-Time, Dependable Kernel for Embedded Systems (Sep. 15, 2011)
In this paper we present a system, called xLuna, composed of three parts: RTEMS, a user-mode version of Linux and a small software layer exposing virtual resources for Linux. We show that, without requiring a processor with paravirtualization support, xLuna is able to provide real-time capabilities, predictability and reliability properties while maintaining the versatility, easy of use and large application base of Linux.
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Rethink your project planning with a virtual platform (Sep. 14, 2011)
Virtual hardware platforms can be leveraged to obtain significant project and product planning improvements in terms of development time, time-to-market, and development process risk.
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Using Multi-Gigabit Transceivers to Test and Debug FPGA (Sep. 06, 2011)
This white paper introduces Byte Paradigm’s new Thunder Series probe. This new generation PC-based instrument uses FPGA multi-gigabit transceivers as high-speed interface for collecting trace data and inserting test pattern stimulus during FPGA testing and debugging. This paper shows the advantages of using high bandwidth links in combination with adequate embedded instrumentation IP implemented in FPGA.
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Transitioning to multicore processing (Sep. 01, 2011)
Hesitating to make the shift from single- to multiple-core processing in your design? Here's a guide to making the transition.
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Cryptography in software or hardware: It depends on the need (Aug. 29, 2011)
As the length of software keys increases to accommodate evolving needs for greater security, so embedded system designs demand a wider variety of cryptographic implementations
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Software forensics for embedded systems developers (Aug. 15, 2011)
In this chapter from his book "The Software IP Detective's Handbook," Bob Zeidman describes some of the concepts behind the new field of software forensics, and how they can be used to safeguard the unique and proprietary Intellectual Property incorporated into your design.
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Get control of ARM system cache coherency with ACE verification (Aug. 11, 2011)
In this Product How-Two article, the Cadence authors describe how to use the company’s Verification IP solutions framework to implement ARM’s AMBA 4 Coherency Extensions (ACE) in embedded SoC designs.
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Making your application code multicore ready (Aug. 01, 2011)
In this product how-to article, Vector Fabrics’ Paul Stavers describes a more efficient way to parallelize code for embedded multicore designs illustrating the process using the company’s online tool to parallelize Google’s VP8 video decoder.
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Guide to VHDL for embedded software developers: Part 2 - More essential commands (Jul. 21, 2011)
A series of three articles for embedded software developers unfamiliar with VHDL that is designed to give concise and useful summary information on important language constructs and usage - helpful and easy to use, but not necessarily complete. Part 2 - More essential commands.
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A guide to VHDL for embedded software developers: Part 1 - Essential commands (Jul. 21, 2011)
A series of three articles for embedded software developers unfamiliar with VHDL that is designed to give concise and useful summary information on important language constructs and usage - helpful and easy to use, but not necessarily complete. Part 1: Essential commands.
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Using drowsy cores to lower power in multicore SoCs (Jul. 18, 2011)
Freescale engineers describe a cascading power management technique that steers tasks to a smaller number of cores during non-peak activity periods so that the idle cores can enter a minimal-power or “drowsy” state.
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Formal Methods to Verify the Power Manager for an Embedded Multiprocessor Cluster (Jul. 05, 2011)
This paper focuses on the verification of the Power Manager in the context of the MIPS32® 1004K™ Coherent Processing System (CPS), in which various software and hardware events can control switching of power states. Without exhaustive verification of the Power Manager, power management functionality of the design cannot be guaranteed. This paper discusses how we successfully used formal methods to verify the Power Manager.
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Taking a multicore DSP approach to medical ultrasound beamforming (Jul. 05, 2011)
A Product How-to on using Freescale MSC8156 multicore DSP to produce diagnostically useful medical ultrasound imaging results, using no more than about 38% of the resources of the DSP, leaving enough room to also perform Doppler imaging.
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Managing power in embedded applications using dual operating systems (Jun. 30, 2011)
In this product how-to article, TI’s Loc Truong describes how to use inter-processor communication and state machine design to reduce the overall system power in a heterogeneous dual-core system based on the company’s OMAP-L138 C6-Integra DSP + ARM processor running its in-house dual DSP/BIOS RTOS.
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Securing Highly Sensitive Assets with AuthenTec's SafeZone Secure Platform (Jun. 27, 2011)
A single device may have to protect data belonging to different parties, as well as data that has different value to different people (both data owners as well as attackers), which means that the amount of effort spent to protect a piece of data, as well as the amount of effort that can be expected to be spent on attacking the data, can differ greatly