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FPGA / CPLD Articles

• Is that Drone the Sound of Progress? (Oct. 24, 2016)
  Somehow in the mid-20th century the military began calling unmanned target aircraft drones. In this century the name has spread–first to other types of unmanned military aircraft, and then to all manner of commercial and consumer flying machines. This article will introduce a taxonomy of these latter drones. We will show that the categories reflect not only manner of use, but also the system architecture. And we will argue that this list of system architectures predicts the roadmap of many different kinds of embedded system designs across the next five years.
  
  
• Hitless I/O: Overcoming challenges in high availability systems (Oct. 12, 2016)
  High availability systems such as servers, communication gateways and base stations need to be continuously operational. Once installed in the field, software upgrades handle feature enhancements and bug fixes.
  
  
• Hubs Become Central to the IoT (Oct. 04, 2016)
  Even before real systems are widely deployed, the Internet of Things (IoT) is rushing into a period of rapid evolution. Early—and, frankly, simplistic—ideas about IoT architecture are giving way to more nuanced views, often based on analysis of data flows and on hard questions of why the IoT really matters.
  
  
• Flash Triggers a Revolution (Sep. 14, 2016)
  Two strong currents of technology change are surging across the data center, sweeping away conventional thinking and leaving behind profoundly changed software, memory, and storage architectures.
  
  
• Power and Complexity: Welcome to AMP (Aug. 18, 2016)
  Asymmetric multiprocessing (AMP) is on the short list to be the technology acronym of the year for 2016. But what is it, exactly, and why would you want any? More usefully, what are the considerations and challenges in implementing AMP in an embedded system?
  
  
• 10 FPGA Design Techniques You Should Know (Jul. 15, 2016)
  Regardless of whether you are using VHDL, System Verilog, or a different design capture language, there are a number of universal design techniques with which FPGA engineers should be familiar, from the very simple to the most advanced.
  
  
• FPGA constraints for the modern world: Product how-to (Jul. 08, 2016)
  Today’s FPGAs are larger and more complex than ever, and defining and applying correct design constraints is one of the biggest challenges. When the design fails to meet the timing performance requirements it can be very time consuming to find the issues, but the process is made easier with well-defined constraints.
  
  
• FPGAs solve challenges at the core of IoT implementation (Jul. 05, 2016)
  The Internet of Things (IoT) has become a wildly popular term these days, often used to describe a world in which virtually every electronic device connects to the Internet and each other. It comprises a staggering list of applications—everything from smart consumer appliances and vehicles to wearables—and that list will only grow as mobility continues to explode. But this growth brings with it implementation challenges to which solutions need to be found.
  
  
• Neural Networks and the Rings of Power (Jun. 01, 2016)
  In the dark world of J.R.R. Tolkien’s Lord of the Rings, the Dark Lord commanded the creation of a set of golden rings that embodied and projected his power. One in particular (Figure 1) held power over the others, with the ability to find them and bring them together.
  
  
• New Layers Form within the Cloud (May. 16, 2016)
  An air mass that begins life as a single huge cloud may separate, under the complex interactions of wind, temperature, pressure, and humidity, into several distinct strata with different characteristics
  
  
• The Mathematics of Range Anxiety (Apr. 25, 2016)
  Late at night, the student in the apartment is awakened by a strange smell. Investigating in the darkened rooms, she sees a burst of flame engulf her roommate’s hoverboard. There is only just enough time to get everyone out of the apartment before the rooms are fully involved.
  
  
• Choosing the right memory for high performance FPGA platforms (Apr. 20, 2016)
  High performance computing is critical for many applications and developers can often find solutions for their own embedded systems design problems in some of the most competitive of these applications.
  
  
• FPGA Debug in the Modern World (Apr. 12, 2016)
  A versatile, iterative, and incremental debug methodology allows FPGA designers to deliver debugged designs quickly and easily ensuring design integrity and robustness.
  
  
• Data Center Ethernet: Is a Bigger Pipe Enough? (Apr. 05, 2016)
  In the enormous pressures and temperatures far beneath the Earth’s surface, minerals take on forms impossible to replicate in our familiar environment. Hence carbon may become diamond, or quartz, or graphite. Similarly, in the intense, dynamic environment of the data center, familiar Ethernet is taking on configurations unimaginable to its inventors at Xerox PARC.
  
  
• From Here to 5G: A Roadmap of Challenges (Feb. 15, 2016)
  Deploy 5G wireless networks by 2020! From research labs to service providers, these words have come to define a shared goal, almost a mantra. As a goal, the words justify all manner of R&D activities. But as a mantra, they betray a fundamental lack of definition. Just what is 5G? And what problems must we solve in order to deploy it?
  
  
• System Security: A Model from Medieval History (Jan. 18, 2016)
  As one security expert has said, system security is not a thing, it is a process. In our increasingly connected—and increasingly hostile—environment, security has become a continuous case of new attacks leading to new countermeasures, followed by more innovative new attacks, and so on.
  
  
• When System Designers Must Care About Silicon IP (Jan. 06, 2016)
  As systems-on-chips move into next-big-thing markets like autonomous vehicles or the Internet of Things (IoT), SoC designers are facing new kinds of requirements—environmental, life-cycle, reliability, and security, for example—completely foreign to their experience in consumer or communications applications.
  
  
• Secure updates for FPGA-based systems (Dec. 14, 2015)
  Here are some things you can do to ensure a secure, reliable, and safe remote update to an FPGA-based embedded system.
  
  
• The IoT Becomes the Web of Things (Nov. 27, 2015)
  Drawn by the scent of huge revenues, great powers are converging on the Internet of Things (IoT). From far up the supply chain semiconductor companies are setting in motion the myriad hardware pieces—tiny microcontroller units (MCUs) for Things, energy-efficient SoCs for hubs, and powerful accelerators for cloud data centers—that will underlie the IoT.
  
  
• System on Chip, or System on Chips: The Many Paths to Integration (Oct. 23, 2015)
  System on chip means putting everything you can on one die. Only lack of technology, major process incompatibility, or physically running out of real estate have seemed valid excuses for taking a multi-die approach to integration. But these ideas are ending.
  
  
• How to power FPGAs with Digital Power Modules (Sep. 14, 2015)
  This article discusses a FPGA reference design generator and walks you through the steps for selecting an FPGA, required power rails, backplane and digital power modules for POL. We will highlight a graphical user interface (GUI) that configures, validates and monitors the FPGA’s power supply architecture, and we will explain the GUI’s sequencing feature to power up the voltage rails, and select the power sequence order and rise and fall times.
  
  
• Flash Upends the Data Center (Sep. 01, 2015)
  Perhaps you could call it a tipping point. For years the increasing density of flash memory chips has meant more room for media on smart phones, cameras, and media players. And far more powerful flash-based solid-state drives (SSDs) have enabled new tablet and notebook computers, and have begun quietly appearing in data centers
  
  
• Secure Embedded Systems: Digging for the Roots of Trust (Jul. 22, 2015)
  
  
  
• The FinFET Revolution is Changing Computer Architecture (Jul. 06, 2015)
  The arrival of FinFETs, starting in the 20 nm CMOS logic process node, has been justly credited with saving Moore’s Law.
  
  
• Sorting Out Embedded Vision Systems (Jun. 11, 2015)
  Papers at this year’s Embedded Vision Summit suggested the vast range of ways that embedded systems can employ focused light as an input, and the even vaster range of algorithms and hardware implementations they require to render that input useful. Applications range from simple, static machine vision to classification and interpretation of real-time, multi-camera video. And hardware can range from microcontrollers to purpose-built supercomputers and arrays of neural-network emulators.
  
  
• Subsystem IP: The Implications Reach Beyond the Chip (May. 18, 2015)
  The appearance of subsystem-scale intellectual property (subsystem IP) cores a few years ago triggered a glacial shift in system-on-a-chip (SoC) design: slow, inexorable, but shoving before it a mound of unintended consequences. As cell-based SoCs and even FPGAs incorporating subsystem IP appear in real systems, we are seeing that those consequences extend even beyond the boundaries of the chip.
  
  
• OK, 4K Ultra-High Definition TV, Where is My Content? (Apr. 13, 2015)
  You lusted after the early demonstration units. You watched with growing anticipation as more vendors announced products. As prices began to fall, you laid your plans. And then at the perfect moment, you pounced! A 4K ultra-high definition (UHD) TV, with a screen the size of a dining table, a two-page list of features, and a final price well under $1000 was yours.
  
  
• Is the System on Chip Coming Apart? (Mar. 10, 2015)
  This disintegration can take any of several paths—some of which wind deep into the promising yet problematic technology of 2.5D packaging, while others lead back to the seemingly archaic landscape of separate chips on a board, albeit with very unarchaic interconnect technology. The only accurate map for these varied routes will spring from the architect’s skill at system partitioning.
  
  
• Can You See Using Convolutional Neural Networks? (Jan. 20, 2015)
  What is a convolutional neural network (CNN) anyway, and, given the rather checkered history of neural networks in engineering, why would you even care? Perhaps we can give a relatively concise answer to both of these very pertinent questions.
  
  
• Motor Control for Computer Architects (Nov. 27, 2014)
  How can it take multiple CPU cores, a bank of hardware accelerators, and a 10G Ethernet interface to control an electric motor? For designers who have run a motor with a $1 microcontroller (MCU), the question may sound absurd. Yet the answer is both an intriguing case study in control systems design and an indication of the direction in which architecture for real-time systems is moving.