Industry Expert Blogs

In March 2010, exactly a year ago, Tabula announced its product, the 40-nm ABAX device. The device promised a little revolution with its virtual 3D architecture, based on time multiplexing and continuous reconfiguration of its logic. At the time I mirrored Tabula’s announcement with Tier Logic’s, another PLD startup. I wondered whether Tabula could be successful, and I expressed some concerns about how much of an advantage in performance Tabula could get against a Xilinx or an Altera that can smoothly scale down their node size. Also questions were raised about the complexity of synthesizing and verifying an automatically time-multiplexed design, as well as about the extra power consumption required to reconfigure the logic with a frequency of 1.6 GHz.

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