MIPI C-PHY v1.2 D-PHY v2.1 TX 3 trios/4 Lanes in TSMC (16nm, 12nm, N7, N6, N5, N3E)
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Exploring the Xilinx Zynq: software platform, or complex FPGA?Practical Chip Design - Brian BaileyAug. 30, 2011 |
One of the enduring challenges of FPGAs with embedded CPUs has been the connection between the processor and the programmable fabric. A conversation at Hot Chips earlier this month with Xilinx vice president Vidya Rajagopalan suggested that Xilinx’s forthcoming entry in this rather exclusive derby, the Zynq 7000, is to be no exception.
There have been two dominant approaches to the interconnect problem, both based on how the vendor perceived the product. If the vendor saw the programmable fabric as a blank slate onto which the customers could write whatever they pleased, the interface tended to be wide and general-purpose, offering enormous potential bandwidth at the cost of considerable complexity. An example might be Altera’s Excalibur product. Alternatively, if the vendor saw the fabric as simply a place to assemble controllers or bus bridges building-block fashion, the interface tended to be a series of standard-for instance AMBA or Wishbone-interfaces ending at stubs in the programmable routing. An example might be the QuickLogic QuickMIPS.