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Aeonic Generate Digital PLL for multi-instance, core logic clocking
Industry Expert Blogs
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Has Intel Got It Wrong On Finfets?Mannerisms - David MannersJul. 30, 2012 |
Intel's triangular finfets suffer a severe performance disadvantage to rectangular finfets and a further disadvantage in respect to SOI finfets, says Professor Asen Asenov of Glasgow University who is the CEO of Gold Standard Simulations.
"Intel may have technological reasons for adopting this shape but by doing so you reduce performance by 12-15%," Asenov tells me.
