English
400G ultra low latency 56/112G FEC and SERDES IP sub 10ns latency
Industry Expert Blogs
|
Ins and outs of SS Link Training in USB3.0VIP Experts Blog - SynopsysMar. 24, 2015 |
As you may know, USB3.0 has a state machine called LTSSM (Link training and status state machine) which is responsible for
- Initialization and link training
- Power management transitions
- Link error recovery and other connectivity issues.
LTSSM has 12 high level states as shown below. In this blog, we will examine the states that are involved in link training, and see how link partners moves to state U0 where actual transfers begin.
Related Blogs
- Digitizing Data Using Optical Character Recognition (OCR)
- Micro FPGAs and embedded FPGAs
- Mitigating Side-Channel Attacks In Post Quantum Cryptography (PQC) With Secure-IC Solutions
- Arm and Arteris Drive Innovation in Automotive SoCs
- The design of the NoC is key to the success of large, high-performance compute SoCs