Aeonic Generate Digital PLL for multi-instance, core logic clocking
Industry Expert Blogs
Can FD-SOI Change the Rule of Game?SemiWiki - Pawan FangariaJun. 19, 2015 |
It appears so. Why there is so much rush towards FD-SOI in recent days? Before talking about the game, let me reflect a bit on the FD-SOI technology first. The FD-SOI at 28nm claims to be the most power-efficient and lesser cost technology compared to any other technology available at that node. There are many other advantages from a technology standpoint which we have heard over a year or two. For example, simplicity of process, no channel doping, excellent electrostatic control of the channel, and back biasing with extremely thin box. These technology aspects translate into limited short channel effect, low DIBL (Drain Induced Barrier Lowering), minimum junction capacitance and diode leakage, lowest leakage current, and excellent voltage threshold variability. The result is – the device can operate at multiple voltages and multiple frequencies. It can be used for high-performance (at 28nm at this time) as well as ULP (Ultra-Low-Power) applications.