Aeonic Generate Digital PLL for multi-instance, core logic clocking
Industry Expert Blogs
Webinar: NetSpeed is about to change the way SOCs are designedSemiWiki - Tom SimonAug. 23, 2018 |
A large part of the effort in designing SOCs has shifted to the integration of their constituent IP blocks. Many IP blocks used in SOCs come as ready to use components and the real work has become making them work together. Network on Chip (NoC) has been a huge help in this task, handling the interconnections between blocks and planning for anticipated traffic. NoCs have evolved quite a bit, becoming more like full blown networks, offering features like QoS, traffic management, cache coherency, high reliability and true layered networking protocols. NetSpeed, a leading provider of NoC technology, is using its foundation technology and a number of innovations to expand their offering to address a much larger part of the job of integrating IP blocks to build an SOC.
NetSpeed’s NocStudio already helps with making architecture decisions and analyzing performance. It also helps with some aspects of SOC verification and physical design. Their new offering, SocBuilder goes much further by handling IP integration and assembly. Additionally, it compliments NocStudio in the areas of SOC verification and physical design. Even more interestingly it provides support for SOC bring-up and debug. Because SocBuilder and NocStudio share a single platform, they share metadata and can be controlled and automated as a single system.
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