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Aeonic Generate Digital PLL for multi-instance, core logic clocking
Industry Expert Blogs
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Genus and Innovus: Compus and SpatialBreakfast Bytes - Paul McLellanApr. 18, 2019 |
Yesterday I covered the first part of Chuck Alpert's presentation on the upcoming-any-day-now release of Genus (19.1 i you're counting). Today I'll dig into the details a bit more.
In the new release, there is a next-generation compiler called Compus (pronounced like compass, my favorite extinct EDA company). This very aggressively flattens the levels of logic. As an example, iChuck had a huge priority encoder might end up with 92,000 instances at elaboration, but can be optimized down to 29,000.
Compus aggressively uses multiple CPUs to try different architectures and so guides the synthesis process to the correct microarchitecture, especially opt. This is analogous to what the user might do in prior generations of synthesis, manually getting the tool to try different ideas and picking the one that looked the most promising for doing all the detailed optimization.
