Infineon and Nanya Announce Production Readiness of 90nm Technology: Volume Manufacturing of Memory Products Started
Process structures of 90nm further reduce chip size compared to the previous 110nm technology thereby increasing potential chip output per wafer by more than 30 percent. The expected productivity increase by shrinking the chip size combined with the use of 300mm wafers is the basis for a significant reduction of production cost per chip. The strategic development alliance of Infineon and Nanya also covers the next technology node with 70nm structures.
“With the qualification of advanced DRAM products on 90nm process technology we have achieved a major milestone towards product and technology leadership and increased DRAM manufacturing productivity,” said Dr. Andreas von Zitzewitz, Member of Infineon’s Management Board and Head of Infineon’s Memory Products Business Group. “The successful development activities with Nanya prove the efficiency of Infineon’s partnership approach and give us a competitive edge in the highly dynamic DRAM industry. Our development team already works with the same ardor on the development of smaller feature sizes for memory products.”
“Our 90nm JD products demonstrated the effectiveness and efficiency of the joint development project between Nanya Technology and Infineon,” said Dr. Jih Lien, President of Nanya Technology. “R&D results are encouraging. But the fact that Nanya Technology leads in the DRAM arena in offering the most advanced 90nm products in volume production is an even more important achievement.”
The introduction of 90nm process structures greatly benefited from the experience with advanced 193nm lithography, introduced at the 110nm node. Expertise in 193nm lithography is essential for smaller process structures. Due to the introduction of the so called “checkerboard cell array” a superior storage capacitance could be achieved by just implementing standard surface enhancement methods instead of using complex high-k dielectrics.
Except for its cost advantage, transition to smaller process geometries is crucial for high-speed and low-power DDR2 and DDR3 SDRAM in an increasingly mobile world. With the validation and customer qualification of the first component, a 512Mb DDR SDRAM, Infineon and Nanya are the industry’s second DRAM manufacturers to introduce the 90nm technology node. The extension of the portfolio with a 512Mb DDR2 SDRAM is expected in the second half of 2005. A variety of other products including 256Mb DDR2 and 1G DDR2 are to follow later on.
About Nanya
Nanya Technology Corporation, one member of the Formosa Plastics Group, is a global leader in advanced memory semiconductors and conducts research and development, design, manufactory, and sales of DRAM products. The company currently owns two 200mm fabrications with the capacity of 73k wafers per month implementing 0.11um process technology. Nanya has launched 90nm and 70nm joint development programs and a 300mm joint venture (Inotera Memories, Inc.) with Infineon Technology AG in December 2002 to remain competitive in the upcoming “nanometer” era. Nanya aims to become a major global DRAM supplier of quality, capability, and accountability. Welcome to visit us at www.nanya.com.
About Infineon
Infineon Technologies AG, Munich, Germany, offers semiconductor and system solutions for automotive, industrial and multimarket sectors, for applications in communication, as well as memory products. With a global presence, Infineon operates through its subsidiaries in the US from San Jose, CA, in the Asia-Pacific region from Singapore and in Japan from Tokyo. In fiscal year 2004 (ending September), the company achieved sales of Euro 7.19 billion with about 35,600 employees worldwide. Infineon is listed on the DAX index of the Frankfurt Stock Exchange and on the New York Stock Exchange (ticker symbol: IFX). Further information is available at www.infineon.com.
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