Think Silicon introduces IPGenius: The first on-line parametrizable IP generation platform
Patras, Greece -- October 18, 2007 -- Think Silicon Ltd, a design services and IP core provider company today announced the availability of the on-line IP configuration tool IPGenius. The program is designed to ease the process of obtaining and integrating IP into SoC designs by offering SoC designers an easy to use web interface for parametrising core properties before receiving them.
IPGenius™
It is an on-line tool for the generation of parametrizable IP modules that can be used in Semiconductor devices. This tool allows the generation of custom-made IP modules from a selection of modules that can be customised according to users' requirements, packaged and delivered to the end-user via the internet. The tool will host a rapidly expanding portfolio of proprietary, partner and verified commercially friendly opensource Semiconductor IP (SIP) modules, that can be parametrised to user requirements from an easy to use web interface.
It is immediately available by visiting http://www.think-silicon.com/ipgenius.php
|
Think Silicon Ltd Hot IP
Related News
- Cadence Introduces 32/28-Nanometer Low-Power RTL-to-GDSII Silicon Realization Reference Flow for Common Platform Alliance
- Silicon Labs Introduces Online Clock Tree Design Service
- Silicon Hive Introduces HiveLogic Configurable Parallel Processing Platform
- First Silicon Solutions Introduces Eclipse-Based Navigator IDE For MIPS New SOC-it Platform
- Open-Silicon Introduces IC-Catalyst - an Integrated Platform for Chip Design and Manufacturing
Breaking News
- Breker RISC-V SystemVIP Deployed across 15 Commercial RISC-V Projects for Advanced Core and SoC Verification
- Veriest Solutions Strengthens North American Presence at DVCon US 2025
- Intel in advanced talks to sell Altera to Silverlake
- Logic Fruit Technologies to Showcase Innovations at Embedded World Europe 2025
- S2C Teams Up with Arm, Xylon, and ZC Technology to Drive Software-Defined Vehicle Evolution
Most Popular
- Intel in advanced talks to sell Altera to Silverlake
- Arteris Revolutionizes Semiconductor Design with FlexGen - Smart Network-on-Chip IP Delivering Unprecedented Productivity Improvements and Quality of Results
- RaiderChip NPU for LLM at the Edge supports DeepSeek-R1 reasoning models
- YorChip announces Low latency 100G ULTRA Ethernet ready MAC/PCS IP for Edge AI
- AccelerComm® announces 5G NR NTN Physical Layer Solution that delivers over 6Gbps, 128 beams and 4,096 user connections per chipset
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |