MIPS Technologies' Silicon-proven GPS RF Tuner IP Reduces Risk for Developers of Next-generation Devices with GPS
Update: MIPS Technologies Acquires Chipidea (August 27, 2007)
GPS RF Tuner IP Cuts Costs and Time-to-market via SiP Integration
LISBON, Portugal - July 28, 2008 - MIPS Technologies, Inc. (NasdaqGS: MIPS), a leading provider of industry-standard architectures, processors and analog IP for digital consumer, home networking, wireless, communications and business applications, introduced a new generation of its Global Positioning System (GPS) RF Tuner IP solution. The silicon-proven, integrated low-noise RF front-end for GPS receivers in the L1 band enables embedded system designers to decrease costs and time-to-market for next-generation devices incorporating GPS.
The new GPS Tuner IP is ideal for companies developing new GPS devices, adding GPS functionality to other types of devices, or looking to reduce the form factor and development costs of a next-generation device. The IP is targeted for virtually any location application, such as high-end navigation systems in cars, cell phones and PDAs. Its cost and area advantages make it especially well suited for ultra-mobile devices, handheld games, portable media players, mobile PCs and digital cameras.
According to market research firm In-stat, GPS chipset shipments are expected to grow to 725 million in 2011, and GPS chipset revenues are expected to grow from $520 million in 2006 to more than $1.3 billion in 2011. The firm also reports that sales of mobile devices with integrated GPS are expected to grow from 180 million units in 2007 to 720 million units in 2011.
"We are seeing increased interest in our GPS IP solutions as navigation and localization technologies proliferate across devices and markets," said Carlos Leme, vice president of IP wireless solutions, Analog Business Group, MIPS Technologies. "Today's device manufacturers are looking to integrate GPS functionality in embedded systems because of the cost, area and time-to-market benefits, especially in high-volume products. Our GPS IP is silicon-proven, allowing customers get to market quickly with low risk."
With standard digital output, the new generation of MIPS Technologies' GPS Tuner IP core CI10084tg supports Global Navigation Satellite System (GNSS) systems in the L1 band and is also compatible with Galileo, for a broad range of markets and applications. The GPS Tuner IP core uses a fractional PLL, allowing designers to leverage the crystal frequencies available in the host application. A wide range of flexible options lets system designers optimize parameters like power modes and baseband filter settings for their specific application. Automatic gain control and tuning provide autonomous operation independent of the selected baseband demodulator. The core has a die area of 4mm2 (including IO ring with ESD protections), with an integrated LNA and PLL loop filter to help maintain a small form factor.
MIPS Technologies' GPS IP solution is optimized for System-in-Package (SiP) integration, with a product roadmap targeting migration to 65nm to support future generations of satellite receivers within SoCs.
About MIPS Technologies, Inc.
MIPS Technologies, Inc. (NasdaqGS: MIPS) is the world's second largest semiconductor design IP company and the number one analog IP company worldwide. With more than 250 customers around the globe, MIPS Technologies is the only company that provides a combined portfolio of processors, analog IP and software tools for the embedded market. The company powers some of the world's most popular products for the digital entertainment, home networking, wireless, and portable media markets-including broadband devices from Linksys, DTVs and digital consumer devices from Sony, DVD recordable devices from Pioneer, digital set-top boxes from Motorola, network routers from Cisco, 32-bit microcontrollers from Microchip Technology and laser printers from Hewlett-Packard. Founded in 1998, MIPS Technologies is headquartered in Mountain View, California, with offices worldwide. For more information, contact (650) 567-5000 or visit www.mips.com.
|
Related News
- Cadence Accelerates Next-Generation Cloud Datacenter Infrastructure with Industry's First Silicon-Proven, Long-Reach 7nm 112G SerDes IP
- SiRF Debuts SiRFlinkIII Combo Radio IC to Drive Next-Generation Mobile Convergence Devices
- 16-Bit, 5MSPS SAR ADC IP Core Silicon-Proven: Delivers Superior Dynamic Performance with Flexible Resolution Modes for Next-Generation Applications
- Sequans adopts Imagination's MIPS Aptiv CPUs for next-generation LTE products
- Kilopass' Next-Generation Gusto-2 Targets Instant-On Mobile Devices
Breaking News
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Cadence Unveils Arm-Based System Chiplet
Most Popular
- Cadence Unveils Arm-Based System Chiplet
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Esperanto Technologies and NEC Cooperate on Initiative to Advance Next Generation RISC-V Chips and Software Solutions for HPC
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- Arteris Selected by GigaDevice for Development in Next-Generation Automotive SoC With Enhanced FuSa Standards
E-mail This Article | Printer-Friendly Page |