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STARC and JEDA Join Forces to Ease Adoption of OSCI TLM2.0 Standard
SANTA CLARA, Calif. -- January 27, 2009 -- JEDA Technologies, the provider of ESL model validation automation announced their STARC-based JEDA TLM2.0 Checker. The Checker will be based on the 2nd edition of the STARC Transaction Level Modeling (TLM) Guide. It will incorporate additional rules, to align with the STARC guidelines. The goal is to help the user to create highly reusable TLM models with a common set of TLM communication abstraction levels to ease the adoption of the OSCI TLM2.0 Standard. The STARC-based JEDA TLM2.0 Checker will be available as a separate product, which includes the STARC rules checker in addition to the OSCI TLM2.0 standard rules. The users can select the checking of each rule individually. They can also configure the severity level of each rule, to either stop the simulation immediately or allow multiple rule violations before the simulation is interrupted. At the end of each simulation the checker generates a summary report.
“Although static lint checkers have been available for STARC TLM Guide, it is not enough to examine models’ dynamic behavior. STARC welcomes STARC-based JEDA TLM2.0 Checker that can check models’ dynamic conformance with STARC TLM Guide 2nd edition and OSCI TLM2.0," stated Mr. Yoshiharu Furui, Senior Manager of Design Standard Group, STARC. He expects that, “by adopting a tool like the JEDA TLM2.0 Checker the model developers increase the quality of the model, and the system developers, software engineers and hardware engineers reduce the overall time to market.”
“Checking for rule violations automatically is important to avoid interoperability problems with models coming from different source,” says Dr. Andrea Kroll, VP Marketing of JEDA Technologies. “The checker detects critical interoperability error right when they are created, which reduces virtual platform validation and debugging time significantly.”
The STARC-based JEDA TLM2.0 Checker will be available within calendar year 2009.
About STARC
Semiconductor Technology Academic Research Center (STARC) was established in December 1995 with investment from Japan’s leading semiconductor suppliers to reinforce semiconductor design capability. Since its inception, STARC has been conducting joint research with universities and the semiconductor industry to strengthen the bases of research in the field of semiconductor technology at domestic universities. The outcomes of these activities have now been utilized industry-wide in Japan through the transfer of technologies to investing companies to help their businesses, the documenting of technical standards and the licensing of technologies to partner companies for commercialization.
http://www.starc.jp/
About JEDA Technologies
JEDA Technologies enables its customers to accelerate their high level model development effort so they can reduce their ESL design risks. We provide products and solutions to measure model quality, help manage ESL design and modeling project schedules. JEDA solution significantly accelerates high level model development and enables an advanced ESL model validation process to reduce the risk of virtual platform development projects. The solution include advanced coverage tools for C++ and SystemC models as well as sophisticated checkers for OCP and TLM2.0-base SystemC models to automat self-checking and detect interoperability issues. The company was founded in 2002 and is located in Santa Clara, California. For more information, please visit www.jedatechnologies.net .
“Although static lint checkers have been available for STARC TLM Guide, it is not enough to examine models’ dynamic behavior. STARC welcomes STARC-based JEDA TLM2.0 Checker that can check models’ dynamic conformance with STARC TLM Guide 2nd edition and OSCI TLM2.0," stated Mr. Yoshiharu Furui, Senior Manager of Design Standard Group, STARC. He expects that, “by adopting a tool like the JEDA TLM2.0 Checker the model developers increase the quality of the model, and the system developers, software engineers and hardware engineers reduce the overall time to market.”
“Checking for rule violations automatically is important to avoid interoperability problems with models coming from different source,” says Dr. Andrea Kroll, VP Marketing of JEDA Technologies. “The checker detects critical interoperability error right when they are created, which reduces virtual platform validation and debugging time significantly.”
The STARC-based JEDA TLM2.0 Checker will be available within calendar year 2009.
About STARC
Semiconductor Technology Academic Research Center (STARC) was established in December 1995 with investment from Japan’s leading semiconductor suppliers to reinforce semiconductor design capability. Since its inception, STARC has been conducting joint research with universities and the semiconductor industry to strengthen the bases of research in the field of semiconductor technology at domestic universities. The outcomes of these activities have now been utilized industry-wide in Japan through the transfer of technologies to investing companies to help their businesses, the documenting of technical standards and the licensing of technologies to partner companies for commercialization.
http://www.starc.jp/
About JEDA Technologies
JEDA Technologies enables its customers to accelerate their high level model development effort so they can reduce their ESL design risks. We provide products and solutions to measure model quality, help manage ESL design and modeling project schedules. JEDA solution significantly accelerates high level model development and enables an advanced ESL model validation process to reduce the risk of virtual platform development projects. The solution include advanced coverage tools for C++ and SystemC models as well as sophisticated checkers for OCP and TLM2.0-base SystemC models to automat self-checking and detect interoperability issues. The company was founded in 2002 and is located in Santa Clara, California. For more information, please visit www.jedatechnologies.net .
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