Arasan Chip Systems adds IEEE 1588 PTP support to Ethernet IP Core
Arasan's Ethernet IP enables Mission Critical control applications using IEEE 1588 PTP
San Jose, California – September, 16, 2009 – Arasan Chip Systems, Inc. (“Arasan”), a leading provider of Intellectual Property (IP) Cores, announced that it has expanded its Ethernet Portfolio by integrating hardware support for IEEE 1588 Precision Time Protocol (PTP). Mission critical environments such as factory automation systems, networking environments, manufacturing, test and measurement systems rely on IEEE 1588 to maintain precise timing synchronization in order to execute activities in real-time.
Arasan’s Ethernet IP with IEEE 1588 enables these distributed systems to select a master clock amongst alternatives and compensate for network delay and jitter while keeping the remainder (slave) clocks in tight synchronization with the master. While other clock synchronization schemes exist, IEEE 1588 PTP implemented over Ethernet offers a scalable, economical solution for clock synchronization across geographically distributed locations. Wireline and wireless network operators can now use IP/Ethernet as the single backhaul network to carry both 2G/3G voice and IP/Ethernet packet traffic instead of using the hybrid two-network approach.
“While the ubiquity and maturity of Ethernet protocol make it a natural choice for data networks, the lack of deterministic frame delivery impedes its deployment in timing critical environments,” said Somnath Viswanath, Product Marketing Manager at Arasan. “System designers can extend their LAN products to enable a single network that can support hard, real-time environments by using Arasan’s Ethernet cores with IEEE 1588 PTP.”
Arasan’s Ethernet IP cores can parse all standard IEEE 1588 frames and has hardware time-stamping for both ingress and egress frames performed at the respective ports. The core implements accurate time monitoring and is capable of synchronizing with an external timer. The IP also includes timers and event synchronization blocks to generate external events based on received PTP packets. The integration of this functionality improves the accuracy as well as reduces the BOM for supporting IEEE 1588 over an Ethernet infrastructure.
Arasan’s comprehensive portfolio of Ethernet IP includes Gigabit, Fast Ethernet Controllers and corresponding portable Ethernet Software Stacks for rapid integration into SoC and FPGA solutions.
About Arasan
Arasan Chip Systems Inc. (www.arasan.com), based in San Jose, CA, USA, is a world leading supplier of IP and the “Total IP Solution” ranging from Intellectual Property (IP), Verification IP (VIP), Hardware Development Kits, Validation Platforms, Portable Software Drivers / Stacks, and Design Services. Arasan delivers technology-leading IP solutions like MIPI, SD / SDIO, USB, PCI, Ethernet, MMC, CE-ATA, CF+, NAND and more, to the global electronics market. Arasan’s IP portfolio enables designers to accelerate their development and simplify their production of complex system-on-chip (SoCs). Arasan provides a competitive advantage through a combination of domain expertise, silicon proven IP, hardware / software tools, and customized service… the “Total IP Solution”.
|
Arasan Chip Systems Hot IP
Related News
- Arasan Chip Systems introduces Ethernet Technology for Real-time environments at Ethernet Technology Summit 2010
- Sibridge Technologies Enhances Ethernet IP Cores with IEEE 1588 PTP
- POSEDGE announces Multi-Port Gigabit Ethernet Switch IP with IEEE 1588 &Audio/visual (AV) bridging Support
- Synopsys Enhances DesignWare Ethernet IP With Support for IEEE 1588 Specification and ARM AMBA 3 AXI Interface
- The new release of SoC-e IEEE 1588 IP Core supports 10 Gigabit Ethernet
Breaking News
- RISC-V in AI and HPC Part 2: Per Aspera Ad Astra?
- InPsytech Announces Finalization of UCIe IP Design, Driving Breakthroughs in High-Speed Transmission Technology
- Creonic Introduces Doppler Channel IP Core
- Chip Interfaces Successfully Completes Interlaken IP Interoperability Test with Cadence 112G Long-Reach PHY
- RISC-V in AI and HPC Part 2: Per Aspera Ad Astra?
Most Popular
- Imagination pulls out of RISC-V CPUs
- Eighteen New Semiconductor Fabs to Start Construction in 2025, SEMI Reports
- BrainChip Brings Neuromorphic Capabilities to M.2 Form Factor
- RISC-V in AI and HPC Part 1: Per Aspera Ad Astra?
- Chip Interfaces Successfully Completes Interlaken IP Interoperability Test with Cadence 112G Long-Reach PHY
E-mail This Article | Printer-Friendly Page |