Noesis Technologies releases NIST FIPS-197 compliant Low Power AES IP core

March 1, 2010 -- Noesis Technologies announced today the immediate availability of its NIST FIPS-197 compliant Advanced Encryption Standard IP core (ntAES8). ntAES8 core can be programmed to encrypt or decrypt 128-bit blocks of data using a 128-bit, 192-bit or 256-bit key.

The ntAES8 has been carefully designed to require minimum logic resources rendering it an ideal solution for low power applications.

This has been achieved by using an 8-bit data path size which means that 16 clock cycles are required to load/unload the 128-bit plaintext/ciphertext block.

Noesis is proud to offer an optimum AES IP core solution exhibiting the best performance-silicon area ratio available in the industry due to a unique architectural implementation of the Galois Field Multiplier (the structural datapath element of all AES cryptographic engines) as well as efficient algorithm mapping techniques.

The encryptor receives the 128-bit plaintext block in 8-bit input symbols and generates the corresponding 128-bit ciphertext block in 8-bit output symbols using a supplied 128, 192, or 256-bit AES key. The pre-computed key values are read from an internal round key RAM. A key expander module is provided as an optional module to allow automatic generation and loading of the round key RAM. The decryptor implements the reverse function, generating plaintext from supplied ciphertext, using the same AES key as was used for encryption.

The ntAES8 IP core is fully compliant with the cryptographic module testing procedures as specified in Advanced Encryption Standard Validation Suite (AESAVS) document.

To learn more about ntAES8 solution visit www.noesis-tech.com/noesis_ntaes8.htm

Licence options and availability

The ntAES8 core is available under a flexible licensing scheme as a soft core (synthesizable HDL) or as a firm core (netlist for FPGA technologies).

The following deliverables are included:

• RMM compliant synthesizable VHDL or Verilog source code or FPGA netlist.
• VHDL or Verilog test benches and example configuration files.
• C++ model.
• Comprehensive technical documentation.

Support

Technical support by phone or email is included. First year of maintenance is also included. Additional support and annual maintenance options are available.

About Noesis Technologies

Noesis Technologies is a leading provider of telecom IP core solutions. Noesis Technologies specializes in the design, development and marketing of high quality, cost effective communication IP cores and provides VLSI design services. Its field of expertise include Forward Error Correction, Cryptography and Networking technology. In these fields, a broad range of high quality IP cores are offered. Noesis IP cores have been licensed worldwide and its impressive list of customers ranges from large companies to dynamic startups in diverse market sectors such telecommunications, networking, military, industrial control and lower-power portable. To learn more, visit www.noesis-tech.com

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