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Ricoh Adopts DeFacTo HiDFT-SIGNOFF Solution for Digital IC Design for Test
Grenoble, France, November 1, 2010. DeFacTo Technologies S.A. today announced that Ricoh Company Ltd. has started to adopt DeFacTo HiDFT-SIGNOFF Design for Test solution following intensive evaluations. Using DeFacTo solution, Ricoh achieves significant improvements by reducing turnaround time during the DFT process.
“DeFacTo’s HiDFT-SIGNOFF enables us to detect key testability issues and improve test coverage early at RTL. Our evaluation has proven that the HiDFT-SIGNOFF flow helps moving our DFT flow from gate-level to RTL. It allows highly accurate test coverage evaluation at RTL. Also, HiDFT-SIGNOFF allows a full RTL interoperability with mainstream ATPG, test compression tools and synthesis tools. Finally the simulation process of ATPG test vectors could be moved to RTL with a very significant speedup. We expect to take advantage from this flow for future complex Designs within Ricoh and significantly improve productivity during the design complex IC.” said Kazunobu Sugaya,Manager, Design Engineering Section, Imaging System LSI Development Center, Electronic Devices Company, Ricoh.
“We are pleased that the RTL testability sign-off solution from DeFacTo has demonstrated to Ricoh a tangible added value in comparison to traditional DFT flows” said Chouki Aktouf, Founder & CEO of DeFacTo Technologies. “We look forward to extending our collaboration with Ricoh to help solving crucial DFT problems”.
About DeFacTo Technologies
DeFacTo Technologies is a leading provider of Design-for-Test solutions at RTL. DeFacTo solutions enable designers to achieve “Design & DFT” closure at RTL by delivering a high quality suite of tools which cover Planning, Analysis, Insertion and Debug needs. DeFacTo is headquartered at 167 rue de Mayoussard, 38430 Moirans, France. For more information, visit us at www.defactotech.com.
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