Analog simulation tools look to better Spice
Analog simulation tools look to better Spice
By Stephan Ohr, EE Times
February 25, 2002 (4:37 p.m. EST)
URL: http://www.eetimes.com/story/OEG20020225S0064
SAN FRANCISCO Nassda Corp. and Ansoft Corp. will announce new versions of their respective analog tool sets this week that offer higher simulation capacity and speed than Spice, the companies said. Nassda (Santa Clara, Calif.) said HSIM 2.0, the latest version of its full-chip verification tool, identifies power leakage and other parasitic effects peculiar to nanometer-scale IC designs. Ansoft (Pittsburgh) will announce version 4.0 of its Turbo Package Analyzer tool, which analyzes electromagnetic effects and other parasitics in complex semiconductor packages. HSIM 2.0 is able to perform full-chip simulation for extremely large circuits. "People come to us when they want to simulate 600 million transistors," said Graham Bell, Nassda's director of marketing. Mitsubishi Electric ran a complete simulation of a 512-Mbit DRAM on a Sun workstation within five hours using HSIM, he said. "These designs don't fit into HSpice anymore," he said. Nassda was formed by Epic Design veterans Sang Wang and An Cheng Deng, developers of TimeMill, PowerMill and other verification tools now under the Synopsys Inc. umbrella, and the ADM products now supported by Avanti Corp. HSIM's performance is a consequence of a hierarchical database, Graham said. For large designs, simulation speed approaches that of Verilog and other behavior tools, while its accuracy is comparable with Spice. HSIM is not positioned as a Spice replacement, Bell said. In fact, HSIM 2.0 includes hooks for Spice circuit analysis, as well as Monte Carlo modeling capability. Designers will still want to perform transient and ac analysis in Spice, Graham said. But HSIM speeds up analyzes that ordinarily take a week or more in Spice, he said. Citing the 0.18-micron and finer designs targeted by HSIM 2.0, Bell said leakage current is a major problem at these dimensions. "Even a t 180-nanometers, leakage currents can take up to 10 percent of your power budgets," he said. HSIM 2.0 now models power leakage as IDDQ with nano-amp accuracy, he said. Additional features of the new release include CircuitCheck and support for Spice MOS models. The CircuitCheck option identifies what Bell called "the stupid stuff," such as error-prone models, short circuits and opens. It offers designers interactive traceback, so they can remove these errors from their schematics. Tackling crosstalk Ansoft's TPA version 4 speeds crosstalk analysis for any type of BGA package structure, according to product manager Jonathan Smith. These include wire bonds, pads, vias, tapered traces, solder balls, and non-ideal power and ground structures. Crosstalk is an increasingly difficult issue on communications pc-boards for 10- and 40-Gbit/second data rates, and on new-generation packages with 800 to 1,000 pins, Smith said. Using a Windows interface, the TPA tool allows u sers to rapidly visualize the coupling effects of high-speed lines on adjacent connectors. A user specifies the number of adjacent or nearby leads for coupling, and TPA then calculates all of the coupling values. In addition to leadframes and pc-board traces, TPA can also examine flip-chips, chip-scale packages, and multiple-die packages. The speed-up offered by TPA 4.0 is due to a model reduction algorithm that divides a metal structure like a semiconductor leadframe into a distributed network of resistance, inductance, and capacitance (RLC) that can be modeled in Spice. The distributed analysis results in higher accuracy and speed than is ordinarily available with lumped circuit analysis, Smith said. TPA characterizes an entire package structure and automatically produces lumped or distributed RLC values for any lead or coupled groups of leads. For a pc-board layout, the TPA tool allows a user to visualize the effects of decoupling capacitors, said Smith. The tool has special value if can lower the cost of manufactured pc-boards by eliminating unneeded capacitors, he said. HSIM 2.0 can be integrated into Cadence Design Systems Inc.'s Analog Artist Environment. A time-based license costs $85,000, and the CircuitCheck option costs and additional $42,000. As a standalone product, it is supported on workstations running Sun Solaris, HP-UX 10.2 and 11, Microsoft Windows NT/2000, or Linux operating systems. The Ansoft TPA links with Cadence's Advanced Package Designer, Avanti's Encore IC Package Designer, and Zuken's CR5000 advanced packaging solution. TPA 4.0 itself costs $70,000. AnsoftLinks, which is usually required to link to a framework, costs $5,000.
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