PLDA Announces vDMA, a Highly Efficient Many-Channel DMA Engine Engineered for Virtualized Systems in Data Centers, to be demonstrated at Flash Memory Summit 2017
PLDA’s vDMA allows thousands of independent and concurrent DMA channels to be distributed among a number of Virtual Machines without sacrificing performance or resource utilization
SAN JOSE, Calif., August 7, 2017 -- PLDA, the industry leader in PCI Express® interface IP solutions, today announced their vDMA™ IP Core, a highly efficient many-channel DMA engine specifically engineered for SoCs that power tomorrow’s virtualized data centers. PLDA has created a demonstration of this new technology for exhibition at Flash Memory Summit 2017, to be held August 7-10, 2017 in Santa Clara, CA.
PLDA’s vDMA IP Core is based on a novel architecture that allows thousands of independent and concurrent DMA channels to be distributed among a number of Virtual Machines (VMs) without sacrificing throughput, latency, or resource utilization. Additionally, it incorporates the data protection and security features required by Enterprise storage and Networking applications.
The exponential traffic growth in Data Centers and the convergence of compute, storage, and network fabric within virtualized systems requires the development of SoCs that implement DMA engines that can move data efficiently between a large number of Virtual Machines. The traditional DMA architecture is limited, however, as it replicates resources for each DMA channel, leading to a high gate count, and typically does not implement the data security and VM isolation features required in today’s Data Center environments.
The PLDA vDMA IP Core solves these issues by providing the scalability required to support thousands of DMA channels and hundreds of VMs, without compromising on performance or resource utilization. This provides significant benefits for SoCs targeted at virtualized data center applications, such as multi-core and many-core network and flow processors, Smart NICs, NVMe and other storage controllers.
The main features of PLDA’s vDMA IP Core include:
- Up to 2048 dynamically reconfigurable DMA channels
- Up to 512 Virtual machines
- Up to 128 outstanding read and write requests
- Data path and Context memory protected with CRC and Parity bits
- VM Isolation enforced with sideband signaling for identification and access control
According to Arnaud Schleich, CEO of PLDA, “PLDA’s vDMA IP core will enable our data center SoC designers to build devices that take advantage of virtualization more efficiently. This new DMA architecture will empower data centers to move even more data, with better performance and improved Quality of Services, for the benefit of Cloud users everywhere”.
For more Information:
- Explore PLDA’s vDMA at Flash Memory Summit, to be held on August 7-10, 2017 in Santa Clara, CA.
- Visit PLDA in Booth #826 at the Flash Memory Summit to view our brand new vDMA demo.
- Don't miss the Enterprise Storage Design Session (Part 1) in Forum D12 (August 8th 3:40-6:05) where Stephane Hauradou will present "Multi-DMA Virtualization for Storage Enterprise Applications"
- Visit the vDMA webpage on the PLDA website.
About PLDA
PLDA has been successfully delivering PCI and PCI Express IPs for more than 20 years. With over 6,200 licenses, PLDA has established a vast customer base and the world’s broadest PCIe ecosystem. PLDA has maintained its leadership over four generations of PCI Express specifications, enabling customers to reduce risk and accelerate time-to-market for their ASIC and FPGA based designs. PLDA provides a complete PCIe solution with its IP cores, FPGA boards for ASIC prototyping, PCIe BFM/testbenches, PCIe drivers and APIs. PLDA is a global company with offices in North America (San Jose, California) and Europe (France, Italy, Bulgaria).
|
Related News
- Xilinx Showcases All Programmable Solutions for Cloud and Data Center Flash Storage at Flash Memory Summit 2015
- Xilinx Showcases Smarter Solutions for Data Center Flash Storage and Application Acceleration at Flash Memory Summit 2014
- IntelliProp First to Market with Memory Fabric Based on CXL; Driving Most Disruptive Technology to Hit Data Centers in Decades
- MIPI UniPro v2.0 Doubles Peak Data Rate and Delivers Greater Throughput and Reduced Latency for Flash Memory Storage Applications
- Rambus Expands Portfolio of DDR5 Memory Interface Chips for Data Centers and PCs
Breaking News
- TSMC drives A16, 3D process technology
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
Most Popular
- Cadence Unveils Arm-Based System Chiplet
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Esperanto Technologies and NEC Cooperate on Initiative to Advance Next Generation RISC-V Chips and Software Solutions for HPC
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- Arteris Selected by GigaDevice for Development in Next-Generation Automotive SoC With Enhanced FuSa Standards
E-mail This Article | Printer-Friendly Page |