Achronix to Speak at D&R IP-SOC Conference in Shanghai
SANTA CLARA, CA-- September 5, 2017 --
What:
Achronix, developer of Speedster™ FPGAs, Speedcore™ eFPGAs and design tools, will be participating in the D&R IP-SOC conference in Shanghai, China.
Eric Law, Achronix, will be speaking about "Speedcore eFPGAs: Revolutionizing the high-performance computing landscape."
When:
Thursday, September 14, 2017. Eric Law will present during session 3a which begins at 14:00. For conference schedule: http://www.design-reuse-embedded.com/ipsocdays/shanghai2017.jsp
Where:
Evergreen Laurel Hotel
No 1136, Zu Chongzhi Road, Pudong New District, Pudong, 201203 Shanghai, China
For a one-on-one meeting, contact Eric Law, eric@achronix.com.
About Achronix Semiconductor Corporation
Achronix is a privately held, fabless semiconductor corporation based in Santa Clara, California. The Company developed its FPGA technology which is the basis of the Speedster22i FPGAs and Speedcore eFPGA technology. All Achronix FPGA products are supported by its ACE design tools that include integrated support for Synopsys Synplify Pro. The company has sales offices and representatives in the United States, Europe, and China, and has a research and design office in Bangalore, India.
|
Related News
- Avant Technology Inc. Will Represent Cortus at D&R IP-SoC Days 2011 - Shanghai
- Inside Secure Embedded Security Expert to Speak at the IP-SOC 2013 Conference and Exhibition
- Evatronix to Discuss Multi-configuration Challenges in IP Design at the D&R IP-SoC Day in Tel-Aviv
- Achronix Presentation at D&R IP SoC China will Detail Accelerating Computing at the Edge with Speedcore eFPGAs
- Cadence Opens Expanded Shanghai Sales Office and R&D Center
Breaking News
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Cadence Unveils Arm-Based System Chiplet
Most Popular
- Cadence Unveils Arm-Based System Chiplet
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Esperanto Technologies and NEC Cooperate on Initiative to Advance Next Generation RISC-V Chips and Software Solutions for HPC
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- Arteris Selected by GigaDevice for Development in Next-Generation Automotive SoC With Enhanced FuSa Standards
E-mail This Article | Printer-Friendly Page |