Fujitsu, Toshiba extend partnership to SoC IP
Fujitsu, Toshiba extend partnership to SoC IP
By Yoshiko Hara, EE Times
November 15, 2002 (6:38 a.m. EST)
URL: http://www.eetimes.com/story/OEG20021113S0039
TOKYO Partners Fujitsu Ltd. and Toshiba Corp. plan to extend their semiconductor collaboration to include system-on-chip technology. But the current plan does not mandate creation of a fully integrated operation, and the companies are deadlocked on a number of details of the technology collaboration.
For now, the partners are in-tegrating their design and process infrastructures for the 90-nanometer and 65-nm generations. To facilitate that integration, they are preparing shared intellectual-property cores. Both companies' engineers have started IP core development with a goal of producing 10 IP cores per year, five by each company.
The plan may also include refinement of existing cores, such as MPEG-4 intellectual property. The IP developed annually, the collaborators said, would anticipate customer requirements a few years down the road for example, the follow-on technology to the IEEE 802.11 variants.
By integ rating design infrastructure, the companies aim to gain more bargaining power with tool vendors and a stronger position when they collaborate with EDA vendors on developing dedicated tools for systems-on-chip.
The partners predict that SoC technology will unroll slowly and that tools thus will become outdated. They have agreed to use a common design tool base for SoC development. "We want to build a new design environment for SoC ICs in cooperation with tool vendors," said Yoshihide Fujii, vice president of Toshiba Semiconductor and head of its strategy and alliances group.
But the collaborators are at odds over how and when to build and operate a pilot production line, and the dispute has stalled the integration of R&D activity.
Fujitsu's Akiruno Technology Center operates a pilot production line with a capacity of 5,000 200-mm wafers per month. It started processing 90-nm chips last December. Toshiba's process development center in Yokohama covers a range of areas.
"If we continue to conduct R&D activities at both Akiruno and Yokohama, we cannot expect cost reduction," Fujii acknowledged. "But we could not reach an agreement on the joint pilot production line."
The partners also differ on details of the volume production line. Toshiba wants to hammer out its own 300-mm fab plan by the end of this fiscal year. But Toshihiko Ono, corporate vice president and group president of Fujitsu's LSI group, said Fujitsu won't consider plans for a new fab until next fiscal year, after its SoC business takes off. The cost of 300-mm wafers is expected to drop sharply by late 2004, so Fujitsu is content to wait, Ono said.
One aspect on which the companies have agreed is to tap the Advanced SoC Platform Corp. (Aspla; Tokyo) consortium as a base for joint research. Aspla was established in July by 11 Japanese semiconductor companies to conduct joint research and establish a common design and process base for the 90-nm node.
Aside from Fujitsu and Toshiba, the maj or shareholders in Aspla are Hitachi, Matsushita Electric, Mitsubishi Electric, NEC, Oki Electric Industry, Rohm, Sanyo Electric, Sharp and Sony.
"We will open our process technology at Aspla as much as possible," Fujii said. The partners are promoting their capabilities in low-power, embedded and high-speed silicon.
Thus far, Fujitsu and Toshiba's collaboration hasn't had the impact of Renesas Technology, a system-on-chip joint venture between Hitachi and Mitsubishi. But Fujii appeared unconcerned. "Around 2005, the real network era the post-PC era will come, and we are preparing to be the leader," Fujii said.
As for whether the companies will fully integrate their SoC businesses at some point, "if a unified operation is necessary, we are open to considering it," said Fujii. "If it were memory business, an integrated operation would be advantageous because it is a power game. But for systems-on-chip, integration is not a must. We'll begin with integrating the infrastruc ture."
Toshiba has divided its semiconductor portfolio into three domains: discrete, memory and logic. "This is the best form, and we have no [plans] to change it," said Fujii. "Toshiba will continue to be an integrated device manufacturer." He argued that chip makers must retain both design and manufacturing capabilities in order to succeed in the SoC business.
Ono concurred that full operational "integration is not necessarily the best solution" at this point. The priority, Ono said, is to draft a successful business model for systems-on-chip.
Fujitsu, Ono said, divides its semiconductor portfolio into memory, SoC devices and compound semiconductors and, like Toshiba, is adamant that its "structure won't change." Fujitsu focuses on optical devices in compound semiconductors. That business contributed significantly to the company's revenue as recently as two years ago but has since been hit hard by declining U.S. demand.
But Ono insisted that, despite the fluctuating market for compound semiconductors, "they will continue to be the core of our business."
Related News
- MoSys Inc. and Fujitsu Limited Extend 1T-SRAM Technology Agreement to 90nm ASIC/SoC Designs; Targets Portable Consumer Applications including Digital Cameras and Video Camcorders
- Fujitsu, Toshiba report on merged SoC efforts
- Fujitsu and Toshiba said to be discussing linking SOC operations
- SiFive and Samsung Foundry Extend Partnership to Accelerate AI SoC Development
- Microsemi and Synopsys Extend 20-Year OEM Relationship and Collaborate on New PolarFire FPGAs to Deliver Customized Synthesis Support
Breaking News
- TSMC drives A16, 3D process technology
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
Most Popular
- Cadence Unveils Arm-Based System Chiplet
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Esperanto Technologies and NEC Cooperate on Initiative to Advance Next Generation RISC-V Chips and Software Solutions for HPC
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- Arteris Selected by GigaDevice for Development in Next-Generation Automotive SoC With Enhanced FuSa Standards
E-mail This Article | Printer-Friendly Page |