Microchip Unveils Family Details and Opens Early Access Program for RISC-V Enabled Low-Power PolarFire SoC FPGA Family

Early access program starts for PolarFire SoC, which delivers simultaneous support of real-time applications and rich operating systems with unparalleled power efficiency

CHANDLER, Ariz., Dec. 10, 2019, RISC-V Summit — The trend towards compute intensive gateways and edge devices is driving the integration of traditional deterministic control applications with additional embedded processing capabilities needed for smart and secure connected systems. In response, Microchip Technology Inc. (Nasdaq: MCHP) is opening the Early Access Program (EAP) for the PolarFire^® system-on-chip (SoC) field programmable gate array (FPGA). The platform offers the world’s first hardened real-time, Linux^® capable, RISC-V-based microprocessor subsystem on the award-winning, mid-range PolarFire FPGA family, bringing class-leading low power consumption, thermal efficiency and defense grade security to embedded systems.

Qualified EAP customers can start designing now with Microchip’s Libero^® SoC 12.3 FPGA design suite and SoftConsole 6.2 integrated development environment for the embedded developer. Customers can also debug their embedded applications today using Renode, a virtual model of the microprocessor subsystem.

“Delivering the industry’s first RISC-V based SoC FPGA along with our Mi-V ecosystem, Microchip and its Mi-V partners are driving innovation in the embedded space, giving designers the ability to develop a whole new class of power-efficient applications,” said Bruce Weyer, vice president of the Field Programmable Gate Array business unit at Microchip. “This in turn will allow our clients to add unprecedented capabilities at the edge of the network for communications, defense, medical and industrial automation.”

PolarFire SoC delivers power efficiency that is up to 50 percent lower power than competitive devices in the industry. This provides numerous customer benefits including reduced bill of materials by eliminating the need for fans and heat sinks. It’s the first SoC FPGA with a deterministic, coherent RISC-V CPU cluster and a deterministic L2 memory subsystem enabling Linux plus real-time applications.

The support of real-time and rich operating systems like Linux is part of Microchip’s growing Mi-V RISC-V ecosystem, a comprehensive suite of tools and design resources developed by Microchip and numerous third parties to fully support RISC-V designs. Ecosystem partners ready to support PolarFire SoC include WindRiver, Mentor Graphics, WolfSSL, ExpressLogic, Veridify, Hex Five, and FreeRTOS as well as development tools from IAR systems and AdaCore.

“For developers endeavoring to incorporate technologies like AI while also meeting the challenges of building real-time systems whose behaviors can be predicted, VxWorks® support for PolarFire SoC is critical for advancing the industry,” said Michel Genard, vice president of Product Management at Wind River. “Given the deterministic, safety-critical nature of PolarFire target applications and support for RISC-V, we anticipate Microchip’s new SoC FPGA will generate a great deal of interest amongst our vast customer base.”

“Low power is a key design consideration for the vast majority of Nucleus RTOS users, making PolarFire SoC an obvious embedded computing platform for Mentor to support,” said Scot Morrison, general manager, Embedded Platform Solutions business unit, Mentor, a Siemens business. “By porting Nucleus to PolarFire SoC, we are helping enable developers to take Nucleus into a broader set of deterministic applications that require scalability and exceptional reliability.”

PolarFire SoC includes extensive debug capabilities including instruction trace and passive run-time configurable Advanced eXtensible Interface (AXI) bus monitors from Mi-V partner UltraSoC, 50 breakpoints, FPGA fabric monitors, and Microchip's built-in two-channel logic analyzer SmartDebug. The PolarFire SoC architecture includes reliability and security features such as single error correction and double error detection (SEC-DED) on all memories, physical memory protection, a differential power analysis (DPA) resistant crypto core, defense-grade secure boot and 128 Kb of flash boot memory.

RISC-V Summit

Mi-V partners Wind River, Mentor Graphics, WolfSSL, Hex Five, Veridify, Digital Core and AdaCore will be demonstrating at the RISC-V Summit their solutions running on PolarFire SoC development platforms.

Availability

To qualify for the early access program, customers can contact PolarFireSoC@microchip.com. The MPFS250T is expected to be available for sampling CQ3 2020. Customers can start designs now with the development tools provided. Public documentation and collateral are also available today. For more information, visit the PolarFire SoC page or contact sales.support@microsemi.com.