Moore's Law Isn't Slowing down - Just Ask System Companies
By Thomas Wong, Cadence
EETimes (July 20, 2020)
Moore’s Law, the tenet that the number of transistors on a chip will double every 18-24 months, has driven the electronics industry for decades. Today, there’s no denying that Moore’s Law is showing its age, with some semiconductor industry leaders going so far as to rewrite its definition. In this era of More-than-Moore, chipmakers are turning to new materials, 3D wafer stacking and heterogeneous integration – die with different manufacturing process nodes and technologies integrated within a single package – to keep driving the pace of advancement.
As semiconductor technology continues to advance, the time to transition from one process node to the next has shrunk significantly. Once assuming a fairly predictable cadence of around four years, the transition from 28nm to 20nm and then to 16nm took approximately 18 months each, despite the industry’s simultaneous move from planar to FinFET transistors at 16nm. Moving to FinFET was a big deal, because it got us back on the Moore’s Law scaling chart.
Not only did we achieve a much-needed area advantage, but we also gained a reduction in power consumption – a key metric for smartphone applications processors. Designers must now undertake a delicate balancing act between battery size/weight and the aesthetics of a slim smartphone against the backdrop of a plethora of additional features (such as a larger screen, better wireless connectivity, higher resolution camera, more storage, fast browser, etc.).
The relentless drive for the next big thing in smartphones and the annual, sometimes bi-annual, product release cadence by major smartphone suppliers have pushed the pace of process migration down to 7nm. We are on the cusp of seeing 5nm applications processors in the next generation of smartphones, and it’s likely that many premium smartphones for the 2020 holiday season will all be powered by 5nm chips! Regardless of market saturation predictions for smartphones worldwide and the reality that unit shipments are hovering at single digit growth, it is still a very lucrative, high-volume market.
E-mail This Article | Printer-Friendly Page |
|
Cadence Hot IP
Related News
Breaking News
- TSMC drives A16, 3D process technology
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
Most Popular
- Cadence Unveils Arm-Based System Chiplet
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Esperanto Technologies and NEC Cooperate on Initiative to Advance Next Generation RISC-V Chips and Software Solutions for HPC
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- Arteris Selected by GigaDevice for Development in Next-Generation Automotive SoC With Enhanced FuSa Standards