Codasip and IAR demonstrate dual-core lockstep for RISC-V

ISO 26262-certified tools from IAR support reference design based on the award-winning Codasip L31 core

embedded world, Nuremberg, Germany, 14 March 2023 – Codasip and IAR deliver new possibilities for low-power embedded automotive applications through the award-winning Codasip L31 core and the safety-certified version of the development toolchain IAR Embedded Workbench for RISC-V. The collaboration demonstrates a path for automotive developers to launch ISO 26262-qualified embedded applications based on the versatile Codasip L31 core.

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32 Bit - Embedded RISC-V Processor Core

Codasip’s dual-core lockstep reference design implements two Codasip L31 cores in a dual-core fault detection subsystem. Codasip L31 is a low-power, general-purpose, embedded RISC-V CPU providing an ideal balance between performance and power consumption. This versatile CPU brings local processing capabilities into a compact area. It can be easily customized with Codasip Studio tools for applications from IoT devices to industrial and automotive control, or as a deeply embedded core in a larger system.

The functional safety edition of IAR Embedded Workbench for RISC-V is certified to ten different standards by TÜV SÜD, including ISO 26262. IAR offers guaranteed customer support for the duration of the support contract with validated service packs, and regular reports of known deviations and problems. IAR Embedded Workbench for RISC-V currently supports the off-the-shelf version of the Codasip L31 core as well as the dual-core lockstep reference architecture.

Jamie Broome, vice president of automotive business and product, Codasip, said: “The automotive market is shifting rapidly driven by increased needs for accelerated innovation with reduced complexity and cost. RISC-V is offering exactly this. Codasip is delivering custom compute with full ownership and control. Through our collaboration with IAR, we provide automotive companies with a straightforward solution for certifying their products for ISO 26262 and other functional safety and security standards.”

Anders Holmberg, chief technology officer, IAR, commented: “Codasip is an important member of the RISC-V ecosystem and together we offer extended possibilities for our automotive customers. Additionally, as both companies are headquartered in Europe, we are well-placed to support our global customers. We are also surrounded by a high concentration of leading automotive manufacturers and suppliers.”

Codasip and IAR are showcasing their solutions at embedded world 2023 taking place on 14-16 March in Nuremberg, Germany. Codasip demonstrates a dual-core lockstep implementation developed using the certified version of IAR’s tools at booth 4-565. IAR shows its development toolchain for RISC-V at booth 4-149.

Don’t miss IAR and Codasip at #ew23.

About Codasip

Codasip is a processor technology company enabling system-on-chip developers to differentiate their products for competitive advantage. Customers leverage the transformational potential of the open RISC-V ISA in a unique way through Codasip’s custom compute offering: Codasip Studio design automation tools and a fully open architecture licensing model combine with a range of processor IP that can be easily customized. The company is proudly European and serves a global market, where billions of devices are already enabled by Codasip technology. Learn more at codasip.com

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