7 µW always on Audio feature extraction with filter banks on TSMC 22nm uLL
RF Engines releases new flexible bit true models for its Vectis Pipelined FFT and Ventrix Polyphase DFT IP Cores
June 30, 2003 - RF Engines Limited (RFEL), the Signal Processing on FPGA specialist, has announced the release of a new set of Fast Fourier Transform (FFT) and Polyphase DFT bit true models for use with Matlab system design software.
One of the main concerns when moving from floating point DSP processing to a fixed point architecture in FPGAs, is making sure that the overall performance of the processing is not compromised by the fixed bit width designs available in the FPGA.
Simon Underhay, RFEL's Technical Sales Manager, commented, "Many of our customers want to make use of our high performance cores for FPGAs but transforming their floating point DSP requirements into a specification for a fixed point FPGA design is not a straightforward task. The flexible models we can now provide allow the designer to easily change critical parameters in the design and model the effects on system performance. This means that a fixed point design can then be purchased that exactly matches the model performance."
In the Vectis Pipelined FFT model, the designer has control over FFT size, oversampling rate, Decimation Factor, Bin Ordering, Twiddle Precision and FFT Processing Precision in addition to the input and output precisions.
The Ventrix Polyphase DFT model, which provides customisable filter taps to significantly improve the filter response in each of the bins, has the additional benefit of allowing the filter length and Polyphase tap precision to be tailored.
Both models are designed to accurately represent the functionality of the RFEL cores, providing the customer with confidence that the delivered core will exactly meet the system requirements.
The figures that follow show 50 frames of the output of the Ventrix Polyphase DFT model being used to track two sources with an A-to-D sample rate of 200MHz. The 512-point Polyphase DFT is set to produce twice oversampled outputs. The first source is located at a fixed baseband frequency of 20MHz and the second source starts at 40MHz and moves at 200kHz per frame. The polyphase DFT provides excellent sidelobe performance so that both sources may be easily identified in the output spectral plots. An FPGA core can be supplied that provides exactly the same results.
Detailed information on the range of cores can be found on the company's website at www.rfel.com
RF Engines RF Engines Limited (RFEL) is a UK based designer, providing high specification signal processing cores, system on chip designs, and FPGA based board solutions for applications in the defence, communications and instrumentation markets. These applications include base stations, wireless and wireline broadband communications systems, satellite communications systems, test and measurement instrumentation, as well as defence systems. More specifically, RFEL is a solutions provider for projects requiring complex front end, real time, wide and narrow band, flexible channelisation. RFEL provides a range of standard cores covering multiple FFT and unique PFT techniques, as well as system design services for specialist applications.
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