Intellitech awarded first of several key patents related to its TEST-IP family of products for IEEE 1149.1 configuration and test
Durham, NH -- (BUSINESS WIRE) July 28th, 2003. -- Intellitech Corp. the technology leader in scan-based configuration, debug and test solutions today announced that the U.S. Patent and Trademark office has awarded the company a patent for its 1149.1 based test and configuration technology. The patent is a broad patent in the area of efficiently accessing circuits for test and configuration. The patent is U.S. Patent number 6,594,802 entitled "Method and Apparatus for optimized access to circuits for debug, programming and test". Asian and European patents are still pending.
Reducing test and configuration times
Electronics companies today are facing increased digital test and configuration times due to increases in non-volatile memory, logic, and system complexity. The long test and configuration times complicates production test line balancing and ‘beat rate' matching resulting in higher capital equipment costs. Traditional on-board programming using 1149.1 boundary scan is typically too slow for large FLASH memories and high volume products. The patented method addresses this problem by enabling on-board programming over IEEE 1149.1 to be as fast as off-board programming techniques. This eliminates the need for in-line programming equipment to match the production line rate or pre-programming an inventory of non-volatile parts prior to production.
Currently, we are focusing this technology on programming FLASH and serial EEPROMS with our products" said Mike Ricchetti, Intellitech Chief Technology Officer. "However, this is a broad patent and we will make use of it for enabling faster test and configuration of other memories and circuits as well."
"Intellitech's success is unquestionably due to its innovations and comprehensive approach to scan based test of electronic products" said CJ Clark, President and CEO for Intellitech Corp. "This patent is the first in a series of fundamental patent filings around our TEST-IP family of infrastructure IP. Today's announcement is a testament to the breadth and depth of our technical leadership and is what clearly sets us apart from our competitors."
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