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ChipIdea Characterized USB2.0 PHY Transceiver Macrocells.
Update: MIPS Technologies Acquires Chipidea (August 27, 2007)
Porto Salvo – October 16, 2003, Chipidea broadens its offering of USB2.0 PHY Transceiver Macrocell 0.18 um solutions in the world leading foundries, including Tower, TSMC, UMC, Chartered and SMIC.Chipidea’s USB2.0 PHY solutions are based on a modular platform concept that supports several customer-specific flavors, including Device and Host applications. They all have a very compact layout (Core area ~0.8 mm2). They offer the best energy efficiency on the market with 120 mW power dissipation in HS Transmission Mode, and include the following features:
- UTMI Intel specification compliant
- USB2.0 Integration in both Device and Host applications
- Serialize and de-serialize the parallel data for transmitter and receiver, respectively.
- 8-bit and 16-bit parallel interface
- Supports 480 Mbit/s "High Speed" (HS), 12 Mbit/s “Full Speed” (FS), "Low Speed" (LS) and 1.5 Mbit/s serial data transmission rates.
- Enhanced testability for reducing production testing cost
- Fully integrated terminating resistors.
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