Canada gears up for system-on-chip research

Canada gears up for system-on-chip research
By Richard Goering, EE Times
May 30, 2001 (4:54 p.m. EST)
URL: http://www.eetimes.com/story/OEG20010530S0079

OTTAWA — Hoping to push Canada into the forefront of system-on-chip (SoC) design, Canadian Microelectronics Corp. (CMC) will launch the SoC Research Network at a workshop June 8. The effort, which has no direct U.S. parallel, will invest $40 million Canadian — about $26 million U.S. — over the next four to five years to build an infrastructure for SoC research at Canadian universities.

CMC, a not-for-profit organization funded by the Canadian government and by industry, has supported microelectronics research at more than 40 Canadian universities since 1984. The organization provides design flows, tools and access to deep-submicron fabrication services.

The SoC Research Network will add to those services by providing SoC-based design flows, silicon intellectual property (IP) and three SoC platforms built for research purposes: a high-performance network-processing platform, a low-power Bluetooth RF platform and an FPGA prototyping platform.

"Our mission is to bring the most advanced capability possible to universities for the design and manufacture of SoC implementations," said Brian Barge, CMC's president and chief executive officer. "As IP blocks are developed and made available to us and others, the SoC Research Network is going to enable collaboration [on a scale] we've never seen before."

While their efforts haven't garnered much publicity, Canadian universities are conducting state-of-the-art chip design research, said Resve Saleh, professor of electrical and computer engineering at the University of British Columbia (UBC). He pointed to research at UBC in FPGA design and test, at Waterloo in simulation, at the University of Toronto in power analysis and at McGill University in test.

Lure of Canada

Saleh, a founder and former chief executive and chairman of Simplex Solutions, was at the University of Illinois for 10 years. He said the evolving SoC Research Network provided a major incentive for his mo ve to Canada last year. While the United States has a collaborative research effort through the Gigascale Silicon Research Consortium (GSRC), there's no centralized location like CMC that provides an infrastructure to support researchers, Saleh noted.

"CMC's charter is setting up all the things you need before you conduct the research," Saleh said. That includes access to IP and design flows: "As users, we get the luxury of having legal, licensing and management concerns taken off our plate."

The SoC Research Network is CMC's "most significant project" at present, said Grant Martin, fellow and chief technologist at Cadence Design Systems. "What they build up will allow much more complex research to be done at Canadian universities, all of which rely on CMC. I haven't seen anything like it in the United States."

Martin, who is Canadian, serves on CMC's technical advisory board. There's no official link between Cadence and the SoC Research Network, he said, although Cadence is a potential provider of tools.

The research network should be helpful to industry as well, said Paul Chow, director of ASIC technology at Accelight, a U.S.-based optical-switching startup with R&D facilities in Ottawa. "By supporting research projects in SoC technology, people will become familiar with it and will already have a background [in it by the time the technology reaches] industry," said Chow, who chairs CMC's technical advisory board.

CMC's Barge said the SoC Research Network is backed by $20 million Canadian from government sources, with a matching $20 million from industry. It will be a major effort for CMC, which has a five-year total budget of around $100 million Canadian. Large Canadian companies like Nortel, Mitel and PMC-Sierra are major CMC corporate backers, Barge said.

Although Canadian companies provide guidance and direction to CMC, the organization's services are only available to Canadian universities at this point. "We have not yet developed an industry program, although there have been sugg estions that the things we do could be helpful to small companies," Barge said.

While CMC has always provided design tools and flows, the SoC Research Network's IP repository is something new. CMC does not intend to redistribute commercial IP, Barge said, but the organization will provide such cores as processors, memories and A/D converters as part of its SoC research platforms. In some cases, he said, CMC may help individual universities acquire IP blocks.

University IP exchange

Moreover, Barge said, the research network will set up an IP management system to facilitate the exchange of university-developed IP. While the concept is that IP developed at one Canadian university will be available to others, "they may choose to share IP or keep it proprietary within their own labs," Barge said. "We don't know how much will be shared; that's part of our business challenge right now."

Work is starting on developing the three SoC platforms planned by CMC. The purpose, said Barge, is to g ive Canadian universities a common research vehicle and to let the universities focus on research rather than on building SoCs from scratch.

Finally, Barge said, the SoC Research Network will give universities access to 0.13-micron fabrication capabilities at low cost. CMC typically contracts with Taiwan Semiconductor Manufacturing Co. and sometimes with the Mosis multiproject wafer fabrication service on behalf of Canadian universities.

At UBC, Saleh said, the SoC Research Network will greatly facilitate research in verification and test. Saleh and his colleagues spend a lot of time looking at embedded test, especially for on-chip memories. UBC is researching what Saleh calls "clever BIST," or built-in self test, that can account for jitter, temperature, IR drop and process variations.

"You can conceive of some sort of packet-switching network on the chip, where you're sending packets to different BIST architectures," Saleh said. "It's an intelligent testing environment that allows you to query the chip and ask, 'Does this IP block work? Does it run at speed?'"

Because the SoC Research Network will provide platforms for network-processing and Bluetooth designs, UBC can focus exclusively on its BIST research, Saleh said. "We don't want to put in 70 person-years' worth of work just to design the chip. We want to take a platform and try all the different BIST techniques, and see if we can actually test a chip."

CMC won't send universities actual silicon, Saleh noted; rather, it will ship a largely predesigned SoC to which university researchers can add their own IP. CMC will then get the chips fabricated and provide test services.

Saleh said UBC expects to create some IP blocks related to test and to contribute those to the SoC Research Network's IP repository.

Accelight's Chow is also a professor of electrical and computer engineering at the University of Toronto, where he researches VLSI architectures. Chow said he hopes to leverage some of the UBC research to "try to build somethin g that looks like a real network processor."