Development of Multi-Level-Interconnect Technologies for High-Speed/Low-Power Consumption 2nd Generation 65nm Node VLSIs
Tokyo, June 18, 2004 --- NEC Corporation and NEC Electronics Corporation today announced that they have succeeded in the development of multi- level Cu/Low-k interconnects for second generation 65nm-node VLSIs. By improving the interconnect structure and dielectric material, reduction of the effective dielectric constant, keff, to the target value of keff equals 3.0 was successfully demonstrated, without degrading reliability. In addition, interconnect power consumption was reduced by 15%, and signal speed was improved by 24%, as compared with conventional structures.
The features of the newly developed Cu/Low-k interconnect are as follows:
(1) Development of high performance multi-level interconnects with Dual Damascene (DD) structure for second generation 65nm node, low-power VLSIs.
(2) Development of DD interconnect structures introducing the porous low-k dielectrics with sub-nanometer pores, both for line dielectrics and via dielectrics, and interconnect parasitic capacitance, which achieved an interconnect power consumption reduction of 15%. Through the coupling of the thin barrier metal with the DD structure, the interconnect CR product boasted a 24% improvement in interconnect performance (as compared with conventional products).
(3) Development of a "DD pore sealing technique", which entails the covering of all the side walls of porous low-k films with an ultra-thin organic low-k film, enabled an improvement in dielectric reliability by 5 times.
In advanced SOCs, the number of lines and the total line length tend to increase by the device scaling-rule, resulting in a rapid increase in the ratio of interconnect load capacitance against the total chip load capacitance. Thus, in order to reduce chip power consumption, the introduction of low-k materials into interconnects is an inevitable requirement. We have adopted a dual damascene (DD) structure in which the line trench and the via hole are simultaneously filled with copper. Compared with the single damascene structure, where the line and via are formed independently, the parasitic capacitance of the DD structure was reduced by 10% due to a decrease in the number of capping dielectrics with relatively high k-value. In addition, through the introduction of a porous low-k film for both via and line dielectrics, a further reduction of 5 % was achieved.
Key fabrication technologies for high performance DD interconnects with porous low-k films are as follows:
1) An etching technique which can reduce plasma damage to low-k films.
2) A low thermal budget process that can suppress thermal stress on Cu interconnects.
How to secure via dielectric reliability is a critical issue for introducing the porous low-k film to the via dielectric. In order to secure via dielectric reliability, we developed a DD pore sealing technique. Plasma polymerized BCB (p-BCB) film, developed by NEC, was used as pore sealing film. In addition, since the p-BCB film has strong resistance to the Cu diffusion as well as relatively low k-value, the barrier metal can be extensively thinned. Consequently, using the DD pore sealing technique, the line resistance and the via resistance were reduced by 9% and 75%, respectively.
NEC Corporation believes that such newly developed technologies for multi level interconnect modules with porous low-k films are needed for 65nm node low power LSIs and will make every effort to realize their early production. NEC Corporation will present these results at the 2004 Symposia on VLSI Technology in Hawaii, USA, on June 15, 2004.
About NEC Electronics Corporation
NEC Electronics Corporation (TSE: 6723) specializes in semiconductor products encompassing advanced technology solutions for the high-end computing and broadband networking markets, system solutions for the mobile handset, PC peripheral, automotive and digital consumer markets, and platform solutions for a wide range of customer applications. NEC Electronics Corporation has 25 subsidiaries worldwide including NEC Electronics America, Inc. (www.necelam.com) and NEC Electronics (Europe) GmbH (www.ee.nec.de). In addition to marketing, selling and supporting NEC Electronics products to customers in their respective regions, NEC Electronics America and NEC Electronics Europe also operate local manufacturing facilities in Roseville, California, and Ballivor, Ireland, respectively. Additionally, NEC Electronics America for North America and NEC Electronics Europe for Europe are the sales and marketing channels of NEC AM-LCD and PDP modules. For additional information about NEC Electronics worldwide, visit www.necel.com.
About NEC Corporation
NEC Corporation (NASDAQ: NIPNY) (FTSE: 6701q.l) is one of the world's leading providers of Internet, broadband network and enterprise business solutions dedicated to meeting the specialized needs of its diverse and global base of customers. Ranked as one of the world's top patent-producing companies, NEC delivers tailored solutions in the key fields of computer, networking and electron devices, by integrating its technical strengths in IT and Networks, and by providing advanced semiconductor solutions through NEC Electronics Corporation. The NEC Group employs more than 140,000 people worldwide and had net sales of 4,906 billion yen (approx. $47 billion) in the fiscal year ended March 2004. For additional information, please visit the NEC home page at: http://www.nec.com.
|
Related News
- Hitachi and Renesas Technology Develop 1.5-V Low-Power, High-Speed Phase Change Memory Module for On-Chip Nonvolatile Memory Applications
- IBM, Chartered Extend 90-Nanometer Common Platform with Low-Power Design Solutions, High-Speed Connectivity Cores
- IBM, Chartered Offer ARM Artisan Low-Power IP And High-Speed PHYS For 90-Nanometer Common Platform
- Actel Delivers Fully Qualified High-Speed, Low-Power Axcelerator Devices
- Rambus Develops Breakthrough Clocking Technology for Power Reduction in High-Speed Interfaces
Breaking News
- Breker RISC-V SystemVIP Deployed across 15 Commercial RISC-V Projects for Advanced Core and SoC Verification
- Veriest Solutions Strengthens North American Presence at DVCon US 2025
- Intel in advanced talks to sell Altera to Silverlake
- Logic Fruit Technologies to Showcase Innovations at Embedded World Europe 2025
- S2C Teams Up with Arm, Xylon, and ZC Technology to Drive Software-Defined Vehicle Evolution
Most Popular
- Intel in advanced talks to sell Altera to Silverlake
- Arteris Revolutionizes Semiconductor Design with FlexGen - Smart Network-on-Chip IP Delivering Unprecedented Productivity Improvements and Quality of Results
- RaiderChip NPU for LLM at the Edge supports DeepSeek-R1 reasoning models
- YorChip announces Low latency 100G ULTRA Ethernet ready MAC/PCS IP for Edge AI
- AccelerComm® announces 5G NR NTN Physical Layer Solution that delivers over 6Gbps, 128 beams and 4,096 user connections per chipset
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |