Altera's New Cyclone II FPGAs Offer 30 Percent Lower Costs Than Previous Generation
New Family is Half the Price of Competing Devices
San Jose, Calif., June 28, 2004—Expanding its leadership in the low-cost FPGA market, Altera Corporation (NASDAQ: ALTR) today launched the new Cyclone™ II device family. Offering 30 percent lower cost and more than three times the logic density than its predecessor, Cyclone II FPGAs will expand on the industry-leading success set by the first-generation Cyclone family. In addition, Cyclone II FPGAs are approximately half the cost and, based on benchmark results from a large suite of designs, are more than 50 percent faster than competing low-cost FPGAs. Designers of low-cost, high-volume products now have a unique combination of density, price and performance, plus an expanded suite of features that will enable them to leverage programmable logic far beyond its traditional applications.
“Cyclone FPGAs deliver low-cost video processing and graphics generation in our Modero Viewpoint Touch Panels, helping to keep our costs to a minimum,” said Peter Nohrén, vice president of engineering for AMX. “With Cyclone II FPGAs, we can further reduce our costs and increase functionality at the same time.”
Based on a cost-optimized architecture manufactured on TSMC’s production-proven 90-nm low-k dielectric process, Cyclone II devices offer more features and greater density plus the lowest cost per logic element (LE) in the industry. Designers in the consumer, industrial, automotive, wireline and wireless communication, and medical markets can now enjoy new and enhanced features of the Cyclone II device family, including:
-
Density – Cyclone II devices range from 4,608 to 68,416 logic elements (LEs), over three times more than was available with first-generation Cyclone devices.
-
Embedded Multipliers – Cyclone II devices feature up to 150 embedded 18 x 18 multipliers, which are ideal for implementing low-cost digital signal processing (DSP) applications. Capable of running at 250 MHz, these multipliers eliminate the performance bottlenecks caused by complex arithmetic calculations and enable the use of Cyclone II devices as FPGA co-processors.
-
Embedded Memory – Cyclone II devices contain M4K memory blocks consisting of 4,608 bits per block and offering up to 1.1 Mbits of on-chip memory supporting multiple configurations including true dual-port and single-port RAM, ROM, and FIFO buffers.
-
External Memory Interface – Cyclone II devices have been designed for high-speed, reliable data transfer and can interface with DDR, DDR II, and SDR SDRAM devices as well as QDRII SRAM devices at up to 668 Mbps.
-
I/O Standards – Cyclone II devices support a variety of single-ended and differential I/O standards including SSTL, HSTL, PCI-X, PCI, LVTTL, LVCMOS, LVDS, mini-LVDS, RSDS, and LVPECL.
-
Soft-Core Processor Support – Cyclone II devices support the recently introduced Nios® II family of embedded processors, which offer exceptional performance, low cost, and the most complete set of software development tools available. When implemented on a Cyclone II device, the Nios II embedded processor delivers over 100 DMIPs performance for as little as $0.35 of logic. This is the lowest-cost 32-bit microprocessor on the market today. In addition, the flexibility of this solution is a compelling alternative to stand-alone processors or embedded hard-core processors where features and performance may be rendered obsolete by the time the entire system design is finalized.
“As the Cyclone series has dramatically increased the capability and decreased the cost of FPGAs, designers are using them more and more as a cost-effective alternative to the growing development costs and risk associated with ASIC design,” said Steve Mensor, Altera’s senior director of product marketing. “With their greater densities and expanded feature set, Cyclone II devices will significantly expand the FPGA market into new, high-volume applications. Designers leveraging this capability have a complete set of development tools, including the free Quartus® II version 4.1 Web Edition software, and IP, including the Nios II soft-core processor, at their disposal to help them quickly implement their designs.”
<>Built on TSMC’s 90-nm Low-k Dielectric Process TechnologyThe Cyclone II family is the second line of Altera FPGAs to be built on TSMC’s production-proven, 90-nm process with Applied Materials’ Black Diamond low-k dielectric. This standard process gives Altera a competitive edge in meeting delivery commitments to customers. On-time delivery of end products onto store shelves is critical to a product’s success, especially in low-cost, high-volume markets. “TSMC’s 90-nm low-k dielectric process has been adopted and proven by several other leading semiconductor companies, including Altera, which is already using it for its Stratix® II FPGA family,” said Francois Gregoire, Altera’s vice president of technology. “Because Cyclone II FPGAs are targeted at cost-sensitive applications, it is important that they be built on a standard, robust process, reducing our customers’ exposure to risk. Our customers can rest assured that we will continue our track record of excellence in execution.”> <>
Pricing and Availability
The first member of the Cyclone II device family, the EP2C35 device, will be available in February 2005. Volume pricing for the EP2C35 will be $22 in 250,000 unit volumes. The web edition of Quartus II version 4.1 software supports the entire Cyclone II family and can be downloaded for free on www.altera.com/q2webedition.>
For more information about Cyclone II devices, visit the Altera website at www.altera.com/cyclone2.
<>About AlteraAltera Corporation (NASDAQ: ALTR) is the world’s pioneer in system-on-a-programmable-chip (SOPC) solutions. Combining programmable logic technology with software tools, intellectual property, and technical services, Altera provides high-value programmable solutions to approximately 14,000 customers worldwide. More information is available at www.altera.com.>
Safe Harbor
This press release contains “forward-looking statements” that are made pursuant to the safe harbor provisions of the Private Securities Litigation Reform Act of 1995. Forward-looking statements are generally preceded by words that imply a future state such as “expect” or “on schedule” or that imply that a particular future event or events will occur such as “will”. Investors are cautioned that all forward-looking statements in this release involve risks and uncertainty, including without limitation the risk that future performance is dependent on our technology development capabilities, meeting our product development schedules, the design performance of software and other tools, the performance and abilities of our subcontractors to provide wafers and assembly/test services in a timely manner. Please refer to the company’s Securities and Exchange Commission filings, copies of which are available from the company without charge.
###
|
Intel FPGA Hot IP
Related News
- Newtec Selects Altera's Cyclone II FPGAs for Satellite Broadband Terminal
- Lionic Adopts Altera's Nios II Processor and Cyclone Series of FPGAs for Silicon-Based Antivirus Solutions
- Altera's New Cyclone II FPGA Packages Further Drive Down Costs for High-Volume Applications
- Altera Cyclone FPGAs and Nios II Embedded Processors Power World's Largest 32-bit Multiprocessor Display System
- Euphonix Chooses Altera's Cyclone FPGAs and Nios II Processor for Audio Mixing Console Product Line
Breaking News
- Jury is out in the Arm vs Qualcomm trial
- Ceva Seeks To Exploit Synergies in Portfolio with Nano NPU
- Synopsys Responds to U.K. Competition and Markets Authority's Phase 1 Announcement Regarding Ansys Acquisition
- Alphawave Semi Scales UCIe™ to 64 Gbps Enabling >20 Tbps/mm Bandwidth Density for Die-to-Die Chiplet Connectivity
- RaiderChip Hardware NPU adds Falcon-3 LLM to its supported AI models
Most Popular
E-mail This Article | Printer-Friendly Page |