ARC-V RHX-105 dual-issue, 32-bit RISC-V processor for real-time applications (multi-core)
LSI Logic ECC Core Significantly Reduces Die Area and Cost of Adding ECC to Arm Processor Based SoC Designs
- LSI Logic's unique ECC Memory Protection core provides cost-effective soft error protection for the tightly coupled memories of the ARM9 and ARM11 family of processors
- Uses word-based 7-bit ECC with intelligent write buffer to significantly reduce die area and cost
SANTA CLARA, Calif., Oct. 19., 2004 ¡V Today at the ARM® Developers Conference (Booth #312), LSI Logic Corporation (NYSE: LSI) announced a significant development in addressing soft error rates (SERs) in ARM core based system-on-a-chip (SoC) designs with the introduction of an error checking and correction (ECC) core. Soft errors, which are caused by radiation, are an industry-wide problem that is becoming more severe with shrinking geometries. In many applications, especially storage and networking, error correction and detection codes are becoming a firm requirement to achieve acceptable Mean-Time-Between-Failure rates. The ECC Memory Protection core, the newest addition to LSI Logic¡¦s CoreWare® intellectual property (IP) library, minimizes die area without sacrificing performance.
The LSI Logic ECC core provides SECDED (single error correct double error detect) protection for the tightly coupled memories (TCMs) of the ARM9 and ARM11 family of processors, and is the first in the industry to use a word-based 7-bit ECC code instead of a commonly used byte-based 20-bit ECC code with a processor tightly coupled memory. By adding a write buffer and read-modify-write circuitry along with innovative control circuitry, the LSI Logic ECC core provides negligible performance impact while allowing for the reduction in check bits, resulting in significant die area and total system cost savings as compared to standard ECC and parity solutions. For example, 5 mm2 of die area savings can be realized using the LSI Logic ECC core in a 0.11 micron ARM966 application with 128kB instruction and 128kB data TCMs using high-density memories.
"We designed the ECC core with performance in mind.¡¨ said Harmel Sangha, director of CoreWare Marketing and Customer Support, LSI Logic. ¡§By taking the ECC core all the way through layout with a real ARM processor, we identified the critical paths and modified the RTL accordingly to provide maximum processor performance. As an example, the ECC core will run at 240 MHz with an ARM966E-S core with 64kB TCMs in our 0.11 micron technology.¡¨
Additionally, the use of a very intelligent write buffer in the LSI Logic ECC core eliminates virtually all stall cycles for further processor performance. In a traditional read-modify-write implementation, a byte write to the TCM causes a cycle of latency. The intelligent write buffer in the LSI Logic ECC core design takes advantage of cycles where the memory isn¡¦t being accessed to prevent stalls in all but the most extreme corner cases.
About CoreWare
The LSI Logic CoreWare IP library provides the industry's most comprehensive set of IP solutions that are proven and designed to work seamlessly with the standard-cell ASIC and RapidChip® Platform ASIC design flows. CoreWare IP includes GigaBlaze® and HyperPHY® high-speed standards-compliant SerDes, high-performance ARM and MIPS processors and associated systems, licensable ZSP„¥ DSP cores, processor peripherals and AMBA on-chip-bus structures, USB cores, Memory PHYs and Controllers, Ethernet MAC and PHY cores, PCI Express, XGXS, SPI4.2 and other protocol layer IP. Customers can leverage CoreWare IP solutions to significantly reduce risk and turn-around times with complex SoC designs. Additionally, a dedicated worldwide IP support organization is available to assist customers in all aspects of CoreWare SoC design.
About LSI Logic Corporation
LSI Logic Corporation (NYSE: LSI) focuses on the design and production of high-performance semiconductors for Consumer, Communications and Storage applications that access, interconnect and store data, voice and video. LSI Logic engineers incorporate reusable, industry-standard intellectual property building blocks that serve as the heart of leading-edge systems. LSI Logic serves its global OEM, channel and distribution customers with Platform ASICs, cell-based ASICs, standard products, host bus adapters, RAID controllers and software. In addition, the company supplies storage network solutions for the enterprise. LSI Logic is headquartered at 1621 Barber Lane, Milpitas, CA 95035. http://www.lsilogic.com.
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