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FPGA / CPLD News

• Altera Provides 50-Gbps SFI-5 Interface on Stratix II GX FPGAs (Wednesday Jan. 23, 2008)
  Hardware tested to verify compliance to the SFI-5 standard, Stratix II GX FPGAs feature up to 20 high-speed serial transceiver channels that can operate at data rates between 600 Mbps and 6.375 Gbps, easily satisfying SFI-5 interface requirements.
  
  
• Altera Ships Industry's Highest Density FPGA Featuring 340K Logic Elements (Tuesday Jan. 22, 2008)
  A member of Altera’s 65-nm Stratix® III family, the EP3SL340 features an industry-leading 340K logic elements (LEs), supports DDR3 memory with interface speeds in excess of 1067 Mbps, and offers the lowest power consumption of any high-density, high-performance programmable logic device (PLD).
  
  
• Xilinx Adds Three New Devices to Award-Winning 65nm Virtex-5 Family to Give Customers in New Markets More Cost and Density Options (Monday Jan. 21, 2008)
  The Virtex-5 family offers designers the industry's most advanced, and available, 65nm FPGA technology and the only FPGAs with built-in PCI Express(R) Endpoint and tri-mode Ethernet MAC blocks.
  
  
• Quest Innovations Selects the LatticeECP2/M FPGA Family for its Next Generation "Raptor" Camera System (Monday Jan. 21, 2008)
  Quest has integrated its QuadCore IP (intellectual property) into the Lattice FPGA. The QuadCore IP is a multi-core, scalable parallel pixel processing unit. By connecting 10 QuadCore IP cores together, Quest is able to deliver more than 1 Gbyte/second image processing and transfer. This latest version of the Raptor camera system will support more than 2Mpixels, 500 fps, and 8Gbytes of memory and is capable of doing pre-processing and storing up to 24 seconds of high speed image data.
  
  
• Xilinx EDK Delivers Processing Peripheral IP Cores at No Additional Cost (Tuesday Jan. 15, 2008)
  The 10/100 Ethernet MAC Lite, single precision floating-point unit, industry standard UART (Universal Asynchronous Receiver/Transmitter) 16450/16550 controller and IIC (Inter-Integrated Circuit) interface IP cores can now be licensed at no additional charge.
  
  
• Xilinx Announces Production Availability of All Virtex-5 SXT Devices (Monday Jan. 14, 2008)
  All three devices in the 65-nm Virtex-5 SXT family are production-qualified and supported by the XtremeDSP portfolio of development tools and IP including, System Generator for DSP, Core Generator(TM), Platform Studio, and ISE(TM) Foundation(TM).
  
  
• Lattice Announces Low-Cost FPGA Based ADC Interface Reference Design Solution (Monday Jan. 14, 2008)
  Lattice today announced its LatticeECP2 and LatticeECP2M FPGA interface reference design supporting the Texas Instruments’ ADS6000 family of analog-to-digital converters (ADCs).
  
  
• Xilinx Teams With Helion to Deliver Enhanced Device Security for Low-Cost FPGAs (Monday Jan. 07, 2008)
  Leveraging its proven cryptographic IP and expertise, Helion has developed IP that enables designers to easily implement the Xilinx DeviceDNA technology in their designs. The Helion approach uses a selection of cryptographic functions to implement the security algorithm and various obfuscation techniques, ensuring that any reverse engineering attacks on the design are made suitably difficult.
  
  
• Xilinx Delivers 50% Lower System Cost With New Small Form Factor FPGAs (Monday Jan. 07, 2008)
  Xilinx unveiled today its latest 90nm low-cost Spartan(TM)-3A FPGAs. Optimized for use in applications such as digital displays, set top boxes and wireless routers, the new small-form factor devices address industry demand for smaller footprint packages, enabling extremely cost-sensitive consumer electronic designs.
  
  
• Xilinx Delivers Complete FPGA-based Development System for Designing Intelligent Automotive Subsystems (Monday Jan. 07, 2008)
  Xilinx announced today immediate availability of the Xilinx Automotive (XA) Electronic Control Unit (ECU) Development Kit, based on its low-cost family of automotive-qualified Xilinx(R) XA Spartan(TM)-3E field programmable gate arrays (FPGAs). The XA Automotive ECU kit provides a platform for rapid development of in-vehicle networking, infotainment, driver assistance, and driver information systems.
  
  
• Actel's ProASIC3L Family Balances Low Power, Speed and Low Cost (Monday Jan. 07, 2008)
  Featuring 40 percent lower dynamic power and 90 percent lower static power than its previous-generation ProASIC3 FPGAs, the new flash-based family combines dramatically reduced power consumption with up to 350MHz operation.
  
  
• Xilinx Introduces Low-cost, Automotive-qualified XA Spartan-3A and Spartan-3A DSP FPGAs (Monday Jan. 07, 2008)
  Xilinx introduced today the Xilinx(R) Automotive (XA) Spartan(TM)-3A and Spartan-3A DSP FPGAs, significantly expanding its portfolio of low-cost automotive-qualified devices. These new offerings bring domain-optimized solutions for high I/O-logic ratio and high-bandwidth digital signal processing (DSP) with low power consumption and advanced design security to the development of infotainment, hybrid cluster, and driver assistance systems.
  
  
• SANYO Leverages Altera Cyclone II FPGAs to Bring High-End Vehicle Camera Features to Broad Market (Wednesday Dec. 19, 2007)
  Altera Corporation today announced its Cyclone® II FPGAs and Nios® II embedded processor are utilized by SANYO Electric Co. in its CCA-BC200 Automotive Rear-View Backup Camera System.
  
  
• Altera Shipping Full Line of 65-nm Cyclone III FPGAs (Wednesday Dec. 19, 2007)
  Altera today announced that all eight members of its low-power, low-cost Cyclone® III family of 65-nm FPGAs are now shipping in production quantities.
  
  
• Actel Delivers Battery-Powered Icicle Kit Based on Industry's Lowest Power FPGA (Monday Dec. 17, 2007)
  Leveraging the company's 5-microwatt IGLOO(TM) FPGA, the kit showcases the ultra low-power attributes, flexible implementation options and battery-saving advantages of IGLOO for portable applications.
  
  
• Lattice Announces Production Release of Entire 90nm LatticeECP2M FPGA Family (Monday Dec. 17, 2007)
  Developed on advanced 90nm CMOS technology utilizing 300mm wafers, the LatticeECP2M devices are the industry’s first low cost FPGAs to offer high-speed embedded SERDES I/O, plus a pre-engineered Physical Coding Sublayer (PCS) block.
  
  
• Stratix III FPGAs Achieve 533-MHz DDR3 Interface Performance (Thursday Dec. 13, 2007)
  Altera Corporation today announced it has achieved DDR3 memory interface speeds in excess of 1067 Mbps with its Stratix® III FPGAs, providing a 33 percent advantage in memory performance over competing FPGA solutions.
  
  
• Altera Zeros Out Power With New MAX IIZ CPLDs for Portable Applications (Monday Dec. 10, 2007)
  Offering a resource advantage of up to six times the density and three times the I/Os compared to competing traditional macrocell-based CPLDs, MAX IIZ devices allow designers to meet changing functional requirements at the same or lower power while saving board space.
  
  
• Xilinx Powered SGI RC100 Reconfigurable Computing Platform Accelerates Bioinformatics Application Over 900X (Monday Dec. 10, 2007)
  Xilinx today announced that an SGI(R) RASC(TM) (Reconfigurable Application Specific Computing) enabled SGI(R) Altix(TM) system from Silicon Graphics, featuring Xilinx(R) Virtex-4 high performance FPGAs, can accelerate the Blast-n (Basic Local Alignment Search Tool for nucleotides) bioinformatics application by more than 900 times compared to a traditional cluster.
  
  
• Actel Drives Industry's Lowest Power FPGAs into Portable Displays (Monday Dec. 10, 2007)
  With a continued focus on delivering low-power solutions for emerging and high-growth portable applications, Actel today announced the availability of flexible solutions for liquid crystal display (LCD) control applications. The new IGLOO Video Demo Board, LCD adaptor boards with LCD panels, the IGLOO Video Demo Kit (IVDK) and display-related reference blocks leverage the company's industry-leading 5 microwatt (µW) Actel IGLOO field-programmable gate arrays (FPGAs).
  
  
• Vector Informatik Adopts Altera Cyclone III FPGAs for Network Interface Product Line (Tuesday Dec. 04, 2007)
  Vector is using the Cyclone III FPGAs to implement network interfaces and the proprietary protocols to communicate with the host system that runs their software diagnostic tools. Vector’s Network Interface product line includes a wide variety of USB-, PCI-, PXI-, PCI Express- (PCIe-), and PCMCIA-based interface solutions for many automotive network protocols, including CAN, LIN, FlexRay and MOST.
  
  
• BAE Systems signs agreement with Achronix to develop high-performance radiation-hardened reconfigurable FPGA (Thursday Nov. 29, 2007)
  BAE Systems, a global defense and aerospace leader, and Achronix Semiconductor, the multi-gigahertz (GHz) field-programmable gate array (FPGA) company, today announced an agreement to jointly develop a reconfigurable radiation-hardened FPGA.
  
  
• Altera's New Nios II Embedded Evaluation Kit Showcases Unique FPGA Design Capabilities For Embedded Systems (Monday Nov. 26, 2007)
  Combining a Cyclone III Starter Board and a touch screen LCD in a unique plexiglass case, the Nios II evaluation kit allows developers to launch example applications, such as networking, audio and image processing, with just the touch of a finger. It also serves as an ideal development platform for software designers new to FPGA-based processors.
  
  
• Xilinx and Brilliant Telecommunications Announce Industry's First Carrier-Class FPGA-Based Network Timing Solution for Next Generation Wired & Wireless Networks (Monday Nov. 26, 2007)
  Implemented using a Xilinx(R) Virtex(TM) or Spartan(TM) FPGA, the solution is delivered in the form of two Intellectual Property (IP) cores, NGNTime and FemtoTime. The cores are fully interoperable with the industry's leading standard Network Timing Protocol (NTP) and provide a migration path for Version 2 of IEEE 1588 or Precision Time Protocol (PTP).
  
  
• Actel Libero IDE v8.1 Maximizes Power Efficiency with New Power-Driven Layout and Advanced Power Analysis (Monday Nov. 19, 2007)
  Actel has rolled out its Libero™ Integrated Design Environment (IDE) with significant new features, such as power-driven layout, that enable designers to further optimize designs to reduce dynamic power consumption by as much as 30 percent for a typical design.
  
  
• Xilinx Launches New Comprehensive Embedded Processing Platform (Wednesday Nov. 14, 2007)
  Anchored by an enhanced 32-128 bit Processor Local Bus (PLB) the platform delivers increased performance and scalability for future performance and feature requirements from Xilinx. The MicroBlaze(TM) 32-bit processor now includes the industry's only configurable Memory Management Unit (MMU) that enables commercial-grade operating system (OS) support and is supported by a host of upgraded IP and design tools delivered with the Embedded Development Kit (EDK) version 9.2.
  
  
• NI and Collaborators Deliver New IP to Simplify FPGA Development (Wednesday Nov. 14, 2007)
  The IPNet offers engineers instant access to more than 100 FPGA IP functions for math and signal processing, data acquisition, signal generation, control, digital communication protocols and sensor simulation.
  
  
• Echelon and Altera Collaborate to Enable More Powerful, Multi-Purpose Controllers for Control Automation Market (Wednesday Nov. 14, 2007)
  As a result of the joint collaboration, the LonWorks communications protocol (a.k.a. ANSI/EIA709.1 and EN14908) has been ported to Altera’s Nios® II embedded processor which is implemented in a Cyclone® FPGA.
  
  
• SRC Selects Altera for Next Generation MAP Processor (Tuesday Nov. 13, 2007)
  Altera today announced that SRC Computers, Inc. has chosen the Stratix® II FPGA device for their new Series I MAP reconfigurable processor module used in high-performance computing applications such as financial, defense, energy and biometrics.
  
  
• Actel Delivers Industry's First 4x4 mm Package For Programmable Logic Devices (Tuesday Nov. 13, 2007)
  Actel Corporation today announced it is offering its low-power 5µW (microwatt) IGLOO field-programmable gate arrays (FPGAs) in a 4-millimeter (mm) package with a 0.4-mm ball pitch, the smallest package for any programmable logic device on the market