Display Port v1.4 Tx PHY & Controller IP, Silicon Proven in TSMC 12FFC
FPGA / CPLD News
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Lattice Semiconductor Launches LatticeSC System Chip FPGA Family (Wednesday Feb. 08, 2006)
LatticeSC FPGA Combines High-Speed I/O, SERDES, Structured ASIC Blocks and High Performance FPGA Fabric On a Single Device
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How to take advantage of partial reconfiguration in FPGA designs (Tuesday Feb. 07, 2006)
The capability of designs to leverage partial reconfiguration opens doors to a whole host of applications.
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Altera and TelASIC Announce Breakthrough Power Efficiency for 3G/3.5G Wireless Base Station Radios (Tuesday Feb. 07, 2006)
Altera Wireless Partner Applies HardCopy, Stratix and Cyclone II Devices for Rapid Development of Flexible Air Interface Systems
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Xilinx Announces PlanAhead 8.1, Delivering a Two Speed-Grade Advantage Over Competing Solutions (Monday Feb. 06, 2006)
New Release Simplifies Partial Reconfiguration and Adds New Productivity-Features to Accelerate Design Closure
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Altera's Stratix II FPGAs Enable 667-Mbps DDR2 SDRAM Data Rate (Monday Feb. 06, 2006)
See 667-Mbps DDR2 SDRAM Interface Demonstration at DesignCon 2006
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Xilinx Delivers Industry's First 667 Mbps DDR2 SDRAM Interface Solution (Tuesday Jan. 31, 2006)
Virtex-4(TM) FPGA-Based Solution Uses Unique ChipSync(TM) Technology to Provide Unmatched Reliability
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Xilinx Announces Advanced Reference Designs To Accelerate Design Of Flat-Panel Displays (Tuesday Jan. 31, 2006)
Proven Alliance Program Solutions Speed Introduction of Leading Edge LCD
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Actel Flash FPGA Provides Heart of Integrated Railway Communications Products (Monday Jan. 30, 2006)
FAR Systems Selects ProASIC Plus Devices for Design Security, Reliability and Single-Chip Ease of Design
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Actel's Axcelerator FPGAs Tapped as Core Controller for BP Microsystems' Enhanced Seventh-Generation Programmers (Tuesday Jan. 24, 2006)
Single-Chip, Antifuse-Based Devices Deliver Greater Speed, Lower Power and Improved Security
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Actel Unveils Development Ecosystem for Industry's First Mixed-Signal FPGAs (Tuesday Jan. 17, 2006)
Application Notes, Boards, Partners, Software Tools and 99 IP Cores Support Fusion Programmable System Chips (PSCs)
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Cypress Delivers PRoC (Programmable Radio-on-a-Chip) Development Kit To Help Customers Streamline Transition To Wireless Connectivity (Tuesday Jan. 17, 2006)
Comprehensive kit simplifies development of 2.4-GHz wireless solutions For applications ranging from PC peripherals to white goods and consumer electronics
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QuickLogic Continues Push into Portable Applications Arena by Embedding SDIO Interfaces into Low Power FPGAs (Thursday Jan. 12, 2006)
provides bridging/controlling solutions for embedded processors to SDIO peripherals
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Actel's ProASIC3 Device Delivers Lowest Total System Cost and Power to Million-Gate FPGAs (Wednesday Jan. 11, 2006)
Million-Gate ProASIC3 Device Provides Leading Performance, Highest Security and Support for Actel's CoreMP7 Soft ARM7-Based Processor Cores
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Altera's Cyclone II and MAX II Devices Selected by General Dynamics for Joint Tactical Radio System (Monday Jan. 09, 2006)
Altera Solution Will Help Shorten Development Time, Reduce Power and Lower Costs for Revolutionary JTRS Cluster 5 Radios
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Xilinx Announces 8.1i Release Of WebPACK - Industry's Only Free Fully Featured Design Suite (Monday Jan. 09, 2006)
All the power and functionality of ISE Foundation now available in WebPACK -
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Sanyo Realizes Industry-Leading Image Quality Using Altera Programmable Logic for Home Theater Systems (Thursday Jan. 05, 2006)
Altera Stratix FPGAs and Nios II Processors Contribute to Development Time and Cost Savings
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Xilinx Targets Fast-Moving, Multi-Function Smart Handset Market With Industry's First Programmable Demonstration Platform (Thursday Jan. 05, 2006)
Programmable solutions critical to keeping pace with consumer demands while meeting low power, small form factor and low cost goals
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Xilinx Demonstrates Industry's First Programmable Expresscard Solution (Thursday Jan. 05, 2006)
Xilinx low cost Spartan-3E FPGA and Philips PCI Express PHY combine to develop high-bandwidth serial PCI Express interface fo r mobile and desktop PCs
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Velogix, FPGA startup seeks to sample app-specific designs (Friday Dec. 23, 2005)
Velogix Inc, formerly known as Flexlogics, is a startup programmable logic company looking to develop sample designs showcasing systems that demonstrate superior capabilities on targeted applications, according to its its website.
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Stacked SRAM cells support programmable startup (Friday Dec. 23, 2005)
Viciciv Technologies Inc. is a startup company that appears to be preparing to enter the FPGA or programmable ASIC market, using patented stacked SRAM cell technology.
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Cypress Ships 50 Millionth PSoC(R) Device (Monday Dec. 19, 2005)
Milestone Confirms Accelerating Adoption of Highly Integrated, Mixed-Signal Architecture in Consumer, Handsets, Industrial and Automotive Systems
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Xilinx Places Trust in GE and Its Own Devices for Global Security (Monday Dec. 19, 2005)
Company deploys GE’s latest technology – powered by Xilinx chips – in facilities throughout the world
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Actel Design Environment Enables Fast, Easy Implementation of World's First Mixed-Signal FPGA (Monday Dec. 12, 2005)
Libero IDE and Starter Kit Empower System Designers to Fully Exploit the Actel Fusion Programmable System Chip
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Xilinx Delivers Faster Timing Closure In ISE 8.1i, Maximizing FPGA Performance Up To 70% Over Competing Solutions (Monday Dec. 12, 2005)
New ISE Fmax Technology provides enhanced physical synthesis capabilities for Virtex-4 and Spartan-3 architectures
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Actel Ships Industry's First Mil-Std-883B Qualified Flash-Based FPGAs (Tuesday Dec. 06, 2005)
Company Continues to Strengthen Military Offering with Fully-Qualified Flexible and Reprogrammable Platform
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Toshiba And Xilinx Agree To Pursue Joint Development Of 65nm FPGAs With A View To Extended Foundry Relationship (Tuesday Dec. 06, 2005)
Companies to build on Toshiba’s production of high-performance 65nm FPGA prototype wafers in preparation for next-generation Xilinx product
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Lattice Semiconductor Expands Its Revolutionary ispClock Family with Programmable, Zero-Delay Clock Generator Devices (Monday Dec. 05, 2005)
Supports DDR II, QDR II and Many Telecom Clocking Applications; Ideal for Clock Generation and Distribution in Backplane Line Cards
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Synplicity Announces Improved Performance for Lattice FPGAs (Tuesday Nov. 29, 2005)
Expansion of OEM and Development Agreement Designed to Produce Superior Results
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Altera Programmable Solutions Accelerate Blaupunkt's Automotive Navigation Product Development (Monday Nov. 28, 2005)
Blaupunkt Shortens Development Time for its TravelPilot Rome Automotive Navigation System Using Altera’s Cyclone FPGAs and Nios II Embedded Processors
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Tektronix, Altera, and FS2 Collaborate on Real-Time Logic Debug Solution for Altera FPGAs (Wednesday Nov. 16, 2005)
Tektronix® TLA Logic Analyzers, Altera Quartus II Design Software Version 5.1, and FS2 FPGAView Software Provide Complete Debug Packag