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Monday, May 26, 2025

• CFX's 55nm BCD process OTP IP has been put on the shelves
• High-Performance USB 3.2 Gen1 & Gen2 PHY and Controller IP Cores from T2M, Powers Next-Gen SoCs
• RISC-V Turns 15 With Fast Global Adoption
• AMD sees TSMC as the clear favorite for 2nm, but Samsung remains in the game

Sunday, May 25, 2025

• Samsung to use Glass Substrate for Semiconductor manufacturing in 2028

Friday, May 23, 2025

• Smart Chips, Safe Trips: How DFT Powers the Future of Autonomy with Vijayaprabhuvel Rajavel
• Analogue Insight and Tetrivis Announce Joint Development of "Eurytion RFK1," a UCIe based 12nm Ka/Ku-Band RF Chiplet Transceiver
• Xiphera Wins ECSO STARtup Award 2025 for Innovation in Cybersecurity

Thursday, May 22, 2025

• Samsung Electronics Nears Decision on Foundry Business Separation
• Pioneering energy-efficient AI with innovative ferroelectric technology
• How Taiwan stays ahead in semiconductor race
• GlobalFoundries partners with A*STAR to accelerate advanced packaging innovation
• SiFive Collaborates with Red Hat to Support Red Hat Enterprise Linux for RISC-V
• EnSilica expands satcoms user terminal portfolio with dual-beam, dual-polarization Ku-band analogue beamformer chipset

Wednesday, May 21, 2025

• Five workflows for tackling heterogeneous integration of chiplets for 2.5D/3D
• Siemens democratizes AI-driven PCB design for small and medium electronics teams
• BrainChip CTO to Present on Architectural Innovation for Low-Power AI at the Embedded Vision Summit
• Cost-Optimized PolarFire® Core FPGAs and SoCs from Microchip Technology Deliver High Performance with a 30% Lower Price Tag
• Expedera's Origin Evolution NPU IP Brings Generative AI to Edge Devices
• Creonic Adds oFEC Codec IP Core to Portfolio, Expanding High-Speed Networking Solutions for ASIC and FPGA
• The RISC-V World Sees Changes, Milestones, and Innovations
• Intel eyes sale of network and edge unit as cost-cutting continues: report

Tuesday, May 20, 2025

• NVIDIA Unveils NVLink Fusion for Industry to Build Semi-Custom AI Infrastructure With NVIDIA Partner Ecosystem
• sureCore extends its sureFIT design service to include custom memory solutions for AI applications
• Advanced IC Packaging: The Roadmap to 3D IC Semiconductor Scaling
• Movellus Claims First On-Die Power Delivery Network Analyzer
• Infineon to revolutionize power delivery architecture for future AI server racks with NVIDIA
• Steering the future: advanced satellite communications phased arrays with GF 45RFSOI, 45RFE and 130NSX

Monday, May 19, 2025

• Versatile Whitebox 1G Ethernet PHY IP Core with BroadR-Reach™ for Connected Automotive and Industrial Systems
• Codasip: Toward Custom, Safe, Secure RISC-V Compute Cores
• Semidynamics: From RISC-V with AI to AI with RISC-V
• InPsytech Joins Samsung SAFE™ IP Partner Program for Excellence in ONFI and UCIe IP Solutions
• Secure-IC at Computex 2025: Enabling Trust in AI, Chiplets, and Quantum-Ready Systems
• RISC-V Technology Seeing Growing Maturity and Penetration
• Siemens to bring advanced timing constraint capabilities to EDA design flow with Excellicon acquisition
• Programmable AI Silicon Would Help Meet AI Workload Demand
• Six HCLTech campuses in India receive the coveted TRUE Zero Waste Platinum Certification

Sunday, May 18, 2025

• Imec and TNO Launch Holst Centre Photonics Lab to Accelerate Integrated Photonics Innovation in the Netherlands

Friday, May 16, 2025

• Perforce Partners with Siemens for Software-Defined, AI-Powered, Silicon-Enabled Design
• Semidynamics: From RISC-V with AI to AI with RISC-V
• TSMC Board of Directors Meeting Resolutions
• Arm Evolves Compute Platform Naming for the AI Era
• Quantum Computing Roadmaps: A Look at The Maps And Predictions of Major Quantum Players
• Automotive Industry Charts New Course with RISC-V
• Samsung Reportedly Revises High-NA EUV Plans: Limited Memory Use, Foundry Begins at 1.4nm
• Sustainable supply chain: training for Leonardo's suppliers

Thursday, May 15, 2025

• Secafy Licenses Menta's eFPGA IP to Power Chiplet-Based Secure Semiconductor Designs
• Arteris Announces Financial Results for the First Quarter and Estimated Second Quarter and Updated Full Year 2025 Guidance
• Perforce Partners with Siemens for Software-Defined, AI-Powered, Silicon-Enabled Design
• Canada's Chip Industry Charts Best Path to Growth
• Keysight Quantum Control System Embedded within Fujitsu and RIKEN’s World-Leading 256-Qubit Quantum Computer
• Putting UCIe in Context