1.8V 3.3V Tolerant General Purpose IO
These libraries are offered at both 16nm and a 12nm shrink. They
are available in a staggered CUP wire bond implementation with a flip chip option.
To design a functional I/O power domain with these cells, an additional library is required – 1.8V Support: Power. That library contains an input-only buffer, isolated analog I/O, and a full complement of power cells along with corner and spacer cells to assemble a complete pad ring by abutment. An included rail splitter allows multiple power domains to be isolated in the same pad ring while maintaining continuous VDD/VSS for robust ESD protection.
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