10Gbps Multi-Link and Multi-Protocol PCIe 3.1 PHY IP for TSMC

Silicon-proven PHY for PCIe, USB, Ethernet, DisplayPort, and other protocols

The Cadence® 10Gbps Multi-Link and Multi-Protocol PHY IP provides a flexible PHY IP that simplifies the design process without compromising performance, power, or silicon die area. The PHY IP has a lower-active and low leakage power design.

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