MIPI C-PHY v1.2 D-PHY v2.1 TX 3 trios/4 Lanes in TSMC (16nm, 12nm, N7, N6, N5, N3E)
12-bit 1-channel up to 1.25MSPS SAR ADC
The IP includes an analog multiplexer which choses one of 32 inputs to be driven into the ADC.
Block has a reference voltage buffer for the ADC.
The block operates directly from VDDIO/VDD33/VDD09 supplies.
Analog voltage references can be generated from internal buffer or supplied externally.
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